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clk: renesas: r8a779f0: Add Ethernet Switch clocks 

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220922051358.3442191-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Yoshihiro Shimoda 2022-09-22 14:13:58 +09:00 committed by Geert Uytterhoeven
parent c516ad4195
commit a3b4137a4d
1 changed files with 2 additions and 0 deletions
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2
drivers/clk/renesas/r8a779f0-cpg-mssr.c
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@ -161,6 +161,8 @@ static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = {
DEF_MOD("cmt3", 913, R8A779F0_CLK_R),
DEF_MOD("pfc0", 915, R8A779F0_CLK_CL16M),
DEF_MOD("tsc", 919, R8A779F0_CLK_CL16M),
DEF_MOD("tsn", 1505, R8A779F0_CLK_S0D2_HSC),
DEF_MOD("rsw", 1506, R8A779F0_CLK_RSW2),
DEF_MOD("ufs", 1514, R8A779F0_CLK_S0D4_HSC),
};