drm/i915/display: force qgv check after the hw state readout

The current intel_bw_atomic_check do not check the possbility
of a sagv configuration change after the hw state readout.
Hence cannot update the sagv configuration until some other
relevant changes like data rates, number of planes etc. happen.
Introduce a flag to force qgv check in such cases.

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240405113533.338553-7-vinod.govindapillai@intel.com
This commit is contained in:
Vinod Govindapillai 2024-04-05 14:35:33 +03:00
parent 1e9e4be8d6
commit aaba7a95dd
2 changed files with 12 additions and 2 deletions

View File

@ -755,6 +755,7 @@ void intel_bw_crtc_update(struct intel_bw_state *bw_state,
intel_bw_crtc_data_rate(crtc_state);
bw_state->num_active_planes[crtc->pipe] =
intel_bw_crtc_num_active_planes(crtc_state);
bw_state->force_check_qgv = true;
drm_dbg_kms(&i915->drm, "pipe %c data rate %u num active planes %u\n",
pipe_name(crtc->pipe),
@ -1339,8 +1340,9 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)
new_bw_state = intel_atomic_get_new_bw_state(state);
if (new_bw_state &&
intel_can_enable_sagv(i915, old_bw_state) !=
intel_can_enable_sagv(i915, new_bw_state))
(intel_can_enable_sagv(i915, old_bw_state) !=
intel_can_enable_sagv(i915, new_bw_state) ||
new_bw_state->force_check_qgv))
changed = true;
/*
@ -1354,6 +1356,8 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)
if (ret)
return ret;
new_bw_state->force_check_qgv = false;
return 0;
}

View File

@ -47,6 +47,12 @@ struct intel_bw_state {
*/
u16 qgv_points_mask;
/*
* Flag to force the QGV comparison in atomic check right after the
* hw state readout
*/
bool force_check_qgv;
int min_cdclk[I915_MAX_PIPES];
unsigned int data_rate[I915_MAX_PIPES];
u8 num_active_planes[I915_MAX_PIPES];