drm/i915/display: force qgv check after the hw state readout
The current intel_bw_atomic_check do not check the possbility of a sagv configuration change after the hw state readout. Hence cannot update the sagv configuration until some other relevant changes like data rates, number of planes etc. happen. Introduce a flag to force qgv check in such cases. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240405113533.338553-7-vinod.govindapillai@intel.com
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@ -755,6 +755,7 @@ void intel_bw_crtc_update(struct intel_bw_state *bw_state,
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intel_bw_crtc_data_rate(crtc_state);
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bw_state->num_active_planes[crtc->pipe] =
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intel_bw_crtc_num_active_planes(crtc_state);
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bw_state->force_check_qgv = true;
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drm_dbg_kms(&i915->drm, "pipe %c data rate %u num active planes %u\n",
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pipe_name(crtc->pipe),
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@ -1339,8 +1340,9 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)
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new_bw_state = intel_atomic_get_new_bw_state(state);
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if (new_bw_state &&
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intel_can_enable_sagv(i915, old_bw_state) !=
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intel_can_enable_sagv(i915, new_bw_state))
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(intel_can_enable_sagv(i915, old_bw_state) !=
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intel_can_enable_sagv(i915, new_bw_state) ||
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new_bw_state->force_check_qgv))
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changed = true;
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/*
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@ -1354,6 +1356,8 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)
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if (ret)
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return ret;
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new_bw_state->force_check_qgv = false;
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return 0;
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}
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@ -47,6 +47,12 @@ struct intel_bw_state {
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*/
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u16 qgv_points_mask;
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/*
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* Flag to force the QGV comparison in atomic check right after the
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* hw state readout
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*/
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bool force_check_qgv;
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int min_cdclk[I915_MAX_PIPES];
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unsigned int data_rate[I915_MAX_PIPES];
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u8 num_active_planes[I915_MAX_PIPES];
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