Blackfin arch: add defines for the on-chip L1 ROM of BF54x
Should not need separate cplb entry though as we cover L1 with a 4 meg page Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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@ -49,6 +49,11 @@
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#define BOOT_ROM_START 0xEF000000
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#define BOOT_ROM_LENGTH 0x1000
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/* L1 Instruction ROM */
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#define L1_ROM_START 0xFFA14000
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#define L1_ROM_LENGTH 0x10000
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/* Level 1 Memory */
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/* Memory Map for ADSP-BF548 processors */
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