RISC-V Fixes for 5.9-rc6 (or shortly after)
* A fix for a lockdep issue to avoid an asserting triggering during early boot. There shouldn't be any incorrect behavior as the system isn't concurrent at the time. * The addition of a missing fence when installing early fixmap mappings. * A corretion to the K210 device tree's interrupt map. * A fix for M-mode timer handling on the K210. I know it's a it of an odd time, so if these don't make rc6 it's not a big deal, but I thought I'd just send it out now rather that waiting as these are ready to go. -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAl9njyYTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYidxhD/4+33HfWLsTefvjiuEIW9W7FvhL+fcm 7X87nirNVsfSVk/jOmQZV1yLZPleT8NA4uXz/nPV5WZ5OGMWBGnKYO3Eza1BPr8o SMuta4ow19hRhWzaz5DWU/vueEjKgIJesFxLt/bc5qS6pbDVKpkOwjoAu3KdWknP gFwk5lWZGubNPXlyNTRtirwMtUwPLBFSjJrfgLMpvDHcXc56sF0Rs8JAQcA2vniJ WudGBzAhYNWJAxBUF+4tLEMXWSp3M2Tl3rnqroJ8dw+OuNO70LcjdLlDwHjNtnN4 mPYdc5YjnFUdGfgyiFfO1s3Y6dp2ypfBKMHkU05yLAjcXI1/lctaIddzsmYka9o2 LXpudzCvsOuRXQpHgwESumfDrpRpzFP7pxeqopxkfRP0DIUWrQtUbnwAHCnuVNWk ua9InAQ5ew3XmuS5+tz8lnjbH80pvmT5RdUZBdKek9STJYwzf2snGtNXsK8Bw35d 3taPHzJwlBRhItEGhulP/+eM3FjnMiK54dI0UvrIV/eKSICvf6qc7gyOrb7YgztN 9oITrtDgsi0s8BqwpuuKZIwMSiaoafxQrmz0JDFRj6Z9x3FJkjS98oFYYiL/X/QJ pLRlioaXc2IocEo5+eDYw+E4hR9wxppiCw+BanXxXTx79omt/I3BI8ClIJN7MCdX TMPXrBmGZV/ovQ== =eGo8 -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-5.9-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: - A fix for a lockdep issue to avoid an asserting triggering during early boot. There shouldn't be any incorrect behavior as the system isn't concurrent at the time. - The addition of a missing fence when installing early fixmap mappings. - A corretion to the K210 device tree's interrupt map. - A fix for M-mode timer handling on the K210. * tag 'riscv-for-linus-5.9-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: RISC-V: Resurrect the MMIO timer implementation for M-mode systems riscv: Fix Kendryte K210 device tree riscv: Add sfence.vma after early page table changes RISC-V: Take text_mutex in ftrace_init_nop()
This commit is contained in:
commit
bdcf11de8f
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@ -32,6 +32,7 @@ config RISCV
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select ARCH_WANT_FRAME_POINTERS
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select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
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select CLONE_BACKWARDS
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select CLINT_TIMER if !MMU
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select COMMON_CLK
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select EDAC_SUPPORT
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select GENERIC_ARCH_TOPOLOGY if SMP
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@ -95,10 +95,12 @@
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#clock-cells = <1>;
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};
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clint0: interrupt-controller@2000000 {
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clint0: clint@2000000 {
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#interrupt-cells = <1>;
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compatible = "riscv,clint0";
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reg = <0x2000000 0xC000>;
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interrupts-extended = <&cpu0_intc 3>, <&cpu1_intc 3>;
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interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7
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&cpu1_intc 3 &cpu1_intc 7>;
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clocks = <&sysctl K210_CLK_ACLK>;
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};
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@ -0,0 +1,26 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2020 Google, Inc
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*/
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#ifndef _ASM_RISCV_CLINT_H
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#define _ASM_RISCV_CLINT_H
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#include <linux/types.h>
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#include <asm/mmio.h>
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#ifdef CONFIG_RISCV_M_MODE
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/*
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* This lives in the CLINT driver, but is accessed directly by timex.h to avoid
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* any overhead when accessing the MMIO timer.
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*
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* The ISA defines mtime as a 64-bit memory-mapped register that increments at
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* a constant frequency, but it doesn't define some other constraints we depend
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* on (most notably ordering constraints, but also some simpler stuff like the
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* memory layout). Thus, this is called "clint_time_val" instead of something
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* like "riscv_mtime", to signify that these non-ISA assumptions must hold.
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*/
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extern u64 __iomem *clint_time_val;
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#endif
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#endif
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@ -66,6 +66,13 @@ do { \
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* Let auipc+jalr be the basic *mcount unit*, so we make it 8 bytes here.
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*/
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#define MCOUNT_INSN_SIZE 8
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#ifndef __ASSEMBLY__
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struct dyn_ftrace;
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int ftrace_init_nop(struct module *mod, struct dyn_ftrace *rec);
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#define ftrace_init_nop ftrace_init_nop
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#endif
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#endif
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#endif /* _ASM_RISCV_FTRACE_H */
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@ -10,6 +10,31 @@
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typedef unsigned long cycles_t;
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#ifdef CONFIG_RISCV_M_MODE
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#include <asm/clint.h>
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#ifdef CONFIG_64BIT
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static inline cycles_t get_cycles(void)
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{
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return readq_relaxed(clint_time_val);
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}
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#else /* !CONFIG_64BIT */
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static inline u32 get_cycles(void)
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{
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return readl_relaxed(((u32 *)clint_time_val));
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}
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#define get_cycles get_cycles
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static inline u32 get_cycles_hi(void)
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{
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return readl_relaxed(((u32 *)clint_time_val) + 1);
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}
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#define get_cycles_hi get_cycles_hi
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#endif /* CONFIG_64BIT */
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#else /* CONFIG_RISCV_M_MODE */
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static inline cycles_t get_cycles(void)
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{
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return csr_read(CSR_TIME);
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}
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#endif /* CONFIG_64BIT */
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#endif /* !CONFIG_RISCV_M_MODE */
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#define ARCH_HAS_READ_CURRENT_TIMER
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static inline int read_current_timer(unsigned long *timer_val)
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{
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@ -97,6 +97,25 @@ int ftrace_make_nop(struct module *mod, struct dyn_ftrace *rec,
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return __ftrace_modify_call(rec->ip, addr, false);
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}
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/*
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* This is called early on, and isn't wrapped by
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* ftrace_arch_code_modify_{prepare,post_process}() and therefor doesn't hold
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* text_mutex, which triggers a lockdep failure. SMP isn't running so we could
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* just directly poke the text, but it's simpler to just take the lock
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* ourselves.
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*/
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int ftrace_init_nop(struct module *mod, struct dyn_ftrace *rec)
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{
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int out;
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ftrace_arch_code_modify_prepare();
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out = ftrace_make_nop(mod, rec, MCOUNT_ADDR);
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ftrace_arch_code_modify_post_process();
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return out;
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}
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int ftrace_update_ftrace_func(ftrace_func_t func)
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{
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int ret = __ftrace_modify_call((unsigned long)&ftrace_call,
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@ -226,12 +226,11 @@ void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
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ptep = &fixmap_pte[pte_index(addr)];
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if (pgprot_val(prot)) {
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if (pgprot_val(prot))
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set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
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} else {
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else
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pte_clear(&init_mm, addr, ptep);
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local_flush_tlb_page(addr);
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}
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local_flush_tlb_page(addr);
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}
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static pte_t *__init get_pte_virt(phys_addr_t pa)
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@ -19,6 +19,11 @@
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#include <linux/interrupt.h>
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#include <linux/of_irq.h>
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#include <linux/smp.h>
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#include <linux/timex.h>
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#ifndef CONFIG_RISCV_M_MODE
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#include <asm/clint.h>
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#endif
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#define CLINT_IPI_OFF 0
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#define CLINT_TIMER_CMP_OFF 0x4000
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static unsigned long clint_timer_freq;
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static unsigned int clint_timer_irq;
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#ifdef CONFIG_RISCV_M_MODE
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u64 __iomem *clint_time_val;
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#endif
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static void clint_send_ipi(const struct cpumask *target)
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{
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unsigned int cpu;
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clint_timer_val = base + CLINT_TIMER_VAL_OFF;
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clint_timer_freq = riscv_timebase;
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#ifdef CONFIG_RISCV_M_MODE
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/*
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* Yes, that's an odd naming scheme. time_val is public, but hopefully
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* will die in favor of something cleaner.
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*/
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clint_time_val = clint_timer_val;
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#endif
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pr_info("%pOFP: timer running at %ld Hz\n", np, clint_timer_freq);
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rc = clocksource_register_hz(&clint_clocksource, clint_timer_freq);
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