PCI MSI: Don't disable MSIs if the mask bit isn't supported
David Vrabel has a device which generates an interrupt storm on the INTx pin if we disable MSI interrupts altogether. Masking interrupts is only a performance optimisation, so we can ignore the request to mask the interrupt. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -126,7 +126,16 @@ static void msix_flush_writes(unsigned int irq)
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}
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}
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static void msi_set_mask_bits(unsigned int irq, u32 mask, u32 flag)
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/*
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* PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
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* mask all MSI interrupts by clearing the MSI enable bit does not work
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* reliably as devices without an INTx disable bit will then generate a
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* level IRQ which will never be cleared.
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*
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* Returns 1 if it succeeded in masking the interrupt and 0 if the device
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* doesn't support MSI masking.
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*/
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static int msi_set_mask_bits(unsigned int irq, u32 mask, u32 flag)
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{
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struct msi_desc *entry;
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@ -144,8 +153,7 @@ static void msi_set_mask_bits(unsigned int irq, u32 mask, u32 flag)
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mask_bits |= flag & mask;
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pci_write_config_dword(entry->dev, pos, mask_bits);
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} else {
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__msi_set_enable(entry->dev, entry->msi_attrib.pos,
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!flag);
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return 0;
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}
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break;
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case PCI_CAP_ID_MSIX:
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@ -161,6 +169,7 @@ static void msi_set_mask_bits(unsigned int irq, u32 mask, u32 flag)
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break;
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}
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entry->msi_attrib.masked = !!flag;
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return 1;
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}
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void read_msi_msg(unsigned int irq, struct msi_msg *msg)
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