Commit Graph

23 Commits

Author SHA1 Message Date
Jassi Brar 6a2b411164 ARM: S3C64XX: SPI: Define SPI controller devices
Platform devices for SPI Controller of S3C64XX are defined and exported for
machines to include. Also, controller setup helper functions are defined for
machine code to set runtime configuration of the controller and the bus.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-01-18 18:27:52 +09:00
Ben Dooks 0084f27a21 ARM: Merge next-s3c64xx
Merge branch 'next-s3c64xx' into next-samsung

Conflicts:
	arch/arm/mach-s3c6400/include/mach/map.h
	( ADC and RTC PA merge fixed)
2010-01-18 09:35:29 +09:00
Maurus Cuelenaere bcedfa98d9 ARM: S3C64XX: Add S3C64XX support to the generic Samsung ADC driver
Add S3C64XX support to the generic Samsung ADC driver

Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-01-18 09:30:49 +09:00
Maurus Cuelenaere 206090913d ARM: S3C64XX: Add S3C64XX RTC platform driver
Add S3C64XX RTC platform driver

Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-01-18 08:47:21 +09:00
Mark Brown c233d94931 ARM: S3C: Move S3C64xx audio devices into S3C64xx directory
Allowing us to make the Kconfig a little bit saner.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-08-14 01:08:27 +01:00
Mark Brown b3748ddd80 [ARM] S3C64XX: Initial support for DVFS
This patch provides initial support for CPU frequency scaling on the
Samsung S3C ARM processors. Currently only S3C6410 processors are
supported, though addition of another data table with supported clock
rates should be sufficient to enable support for further CPUs.

Use the regulator framework to provide optional support for DVFS in
the S3C cpufreq driver. When a software controllable regulator is
configured the driver will use it to lower the supply voltage when
running at a lower frequency, giving improved power savings.

When regulator support is disabled or no regulator can be obtained
for VDDARM the driver will fall back to scaling only the frequency.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-06-16 23:36:24 +01:00
Ben Dooks bcb8a0d6f5 [ARM] S3C: Merge next-s3c64xx-dma2 into for-rmk-devel
Merge branch 'next-s3c64xx-dma2' into for-rmk-devel

Conflicts:

	arch/arm/plat-s3c64xx/Makefile
2009-05-18 16:32:29 +01:00
Ben Dooks fa7a7883fe [ARM] S3C64XX: DMA support
Add support for the DMA blocks in the S3C64XX series of CPUS,
which are based on the ARM PL080 PrimeCell system.

Unfortunately, these DMA controllers diverge from the PL080
design by adding another DMA controller register and
configuration for OneNAND.

Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-05-18 16:29:21 +01:00
Ben Dooks 4faf686763 [ARM] S3C64XX: Add S3C6400 SDHCI setup support
Add support for S3C6400 SDHCI channels 0 and 1, making
the GPIO code common to both S3C6400 and S3C6410.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-05-07 11:04:58 +01:00
Ben Dooks 966bcc1438 [ARM] S3C64XX: Add IRQ PM code
Add support for saving the state of the IRQ registers over suspend.

This requires moving the S3C64XX UART registers into <plat/regs-serial.h>
and adding irq-pm.c which saves the state of all the IRQ registers.

The irq-pm.c saves all the IRQ registers, including the IRQ_EINT and
IRQ_EINT_GROUP registers as it was easier than adding three different
files. Also ensuring that all the registers are restored to the same
state as before suspend is considered to be the best thing to do.

Note, we do not suspend the VIC here, this is done by the VIC driver
itself.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-05-07 11:04:56 +01:00
Ben Dooks bd117bd161 [ARM] S3C64XX: Initial support for PM (suspend to RAM)
Add the initial support for the S3C64XX based systems to use
suspend-to-RAM to sleep.

Includes basic debugging for use with the SMDK6410 usign the
LEDs on the baseboard.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-05-07 11:04:55 +01:00
Ben Dooks c7a0401e61 [ARM] S3C64XX: Add standard S3C64XX 24BPP LCD GPIO setup
Add a standard helper to configure the LCD output pins for a 24BPP
display with VSYNC/HSYNC/VDEN.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:57:19 +00:00
Ben Dooks f9e2f3453c [ARM] S3C64XX: Setup functions for i2c bus 1.
Add common gpio setup for i2c bus 1 on all current
S3C64XX architectures.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:43:29 +00:00
Ben Dooks 55132b8b46 [ARM] S3C64XX: Add i2c device setup for I2C device 0
Add the necessary device initialisation information
for I2C device 0.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:42:21 +00:00
Ben Dooks 89d043c3db [ARM] S3C64XX: GPIO library support
Add gpiolib registration for the GPIOs available on the
S3C64XX platform

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:33:59 +00:00
Ben Dooks 80789e7915 [ARM] S3C64XX: Add IRQ_EINT support
Add the necessary code to support IRQ_EINT(x) on
the S3C64XX series of CPUs.

Note, since there is no GPIO configuration support
in the kernel, the irq set_type method does not
configure the relevant pin to interrupt.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 23:15:46 +00:00
Ben Dooks cf18acf0e0 [ARM] S3C64XX: Clock support for S3C6400/S3C6410
Add the PLL clock initialisation and clock registration
and include the clocks sourced via CLKDIVx for most of
the on-chip peripherals.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:54:36 +00:00
Ben Dooks 4b31d8b225 [ARM] S3C64XX: Add initial clock framework
Add the initial clocks definitions for the s3c6400
and s3c6410. Move the epll and ext clock from the
s3c2443 support into the common code.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:53:58 +00:00
Ben Dooks aa64ea3f78 [ARM] S3C64XX: Common init code for S3C6400 and S3C6410
Add the common initialisation code for both the
S3C6400 and S3C6410, the UART registration.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:53:14 +00:00
Ben Dooks d9b79fb568 [ARM] S3C64XX: Add VIC0 and VIC1 sourced interripts
Add and initialise the two VIC (PL192) found on
the S3C64XX series CPUs.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:51:22 +00:00
Ben Dooks beda30f6a9 [ARM] S3C64XX: Basic CPU detection and map initialisation
Initialise the basic physical to virtual mappings and
then detect the CPU that the system is being run on so
that the cpu code code can call the correct initialisation
code.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:50:31 +00:00
Ben Dooks 0241cbb9d6 [ARM] S3C64XX: Add UARTdevice definitions
Add resources and information for the UART deviecs
on the S3C64XX CPUs.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:49:46 +00:00
Ben Dooks a08ab63761 [ARM] S3C64XX: Initial arch directory
Add the initial PLAT_S3C64XX support files
and directory structure.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-12-15 21:47:24 +00:00