Fix a typo in the code.
Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4434
Signed-off-by: John Crispin <blogic@openwrt.org>
Use common clock infrastructure instead of private APIs.
1. Enable COMMON_CLK in the Kconfig.
2. Remove private clock APIs, which are replaced by the code in
drivers/clk/clk-ls1x.c.
3. Modify header file for drivers/clk/clk-ls1x.c.
Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4431
Signed-off-by: John Crispin <blogic@openwrt.org>
This fixes a redefinition of clk_*:
arch/mips/loongson1/common/clock.c:23:13: error: redefinition of 'clk_get'
include/linux/clk.h:281:27: note: previous definition of 'clk_get' was here
arch/mips/loongson1/common/clock.c:41:15: error: redefinition of 'clk_get_rate'
include/linux/clk.h:302:29: note: previous definition of 'clk_get_rate' was here
make[3]: *** [arch/mips/loongson1/common/clock.o] Error 1
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips@linux-mips.org
Reviewed-by: John Crispin <blogic@openwrt.org>
Acked-by: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/4143/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Adds basic platform devices for Loongson 1B, including serial port,
ethernet, USB, RTC and interrupt handler.
The Loongson 1B UART is compatible with NS16550A, the Loongson 1B GMAC is
built around a Synopsys IP Core.
Use normal instead of enhanced descriptors.
Thanks to Giuseppe for updating the normal descriptor in stmmac driver.
Thanks to Zhao Zhang for implementing the RTC driver.
Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: wuzhangjin@gmail.com
Cc: zhzhl555@gmail.com
Cc: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/4133/
Patchwork: https://patchwork.linux-mips.org/patch/4134/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Kelvin Cheung
Yoichi Yuasa