55 lines
1.9 KiB
ReStructuredText
55 lines
1.9 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0-or-later
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=====================
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Kernel driver w1-uart
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=====================
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Author: Christoph Winklhofer <cj.winklhofer@gmail.com>
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Description
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-----------
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UART 1-Wire bus driver. The driver utilizes the UART interface via the
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Serial Device Bus to create the 1-Wire timing patterns as described in
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the document `"Using a UART to Implement a 1-Wire Bus Master"`_.
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.. _"Using a UART to Implement a 1-Wire Bus Master": https://www.analog.com/en/technical-articles/using-a-uart-to-implement-a-1wire-bus-master.html
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In short, the UART peripheral must support full-duplex and operate in
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open-drain mode. The timing patterns are generated by a specific
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combination of baud-rate and transmitted byte, which corresponds to a
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1-Wire read bit, write bit or reset pulse.
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For instance the timing pattern for a 1-Wire reset and presence detect uses
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the baud-rate 9600, i.e. 104.2 us per bit. The transmitted byte 0xf0 over
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UART (least significant bit first, start-bit low) sets the reset low time
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for 1-Wire to 521 us. A present 1-Wire device changes the received byte by
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pulling the line low, which is used by the driver to evaluate the result of
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the 1-Wire operation.
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Similar for a 1-Wire read bit or write bit, which uses the baud-rate
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115200, i.e. 8.7 us per bit. The transmitted byte 0x80 is used for a
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Write-0 operation (low time 69.6us) and the byte 0xff for Read-0, Read-1
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and Write-1 (low time 8.7us).
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The default baud-rate for reset and presence detection is 9600 and for
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a 1-Wire read or write operation 115200. In case the actual baud-rate
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is different from the requested one, the transmitted byte is adapted
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to generate the 1-Wire timing patterns.
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Usage
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-----
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Specify the UART 1-wire bus in the device tree by adding the single child
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onewire to the serial node (e.g. uart0). For example:
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::
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@uart0 {
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...
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onewire {
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compatible = "w1-uart";
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};
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};
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