67 lines
1.3 KiB
C
67 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020-2021 ARM Ltd.
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*/
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#ifndef __ASM_KVM_MTE_H
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#define __ASM_KVM_MTE_H
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#ifdef __ASSEMBLY__
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#include <asm/sysreg.h>
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#ifdef CONFIG_ARM64_MTE
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.macro mte_switch_to_guest g_ctxt, h_ctxt, reg1
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alternative_if_not ARM64_MTE
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b .L__skip_switch\@
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alternative_else_nop_endif
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mrs \reg1, hcr_el2
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tbz \reg1, #(HCR_ATA_SHIFT), .L__skip_switch\@
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mrs_s \reg1, SYS_RGSR_EL1
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str \reg1, [\h_ctxt, #CPU_RGSR_EL1]
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mrs_s \reg1, SYS_GCR_EL1
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str \reg1, [\h_ctxt, #CPU_GCR_EL1]
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ldr \reg1, [\g_ctxt, #CPU_RGSR_EL1]
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msr_s SYS_RGSR_EL1, \reg1
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ldr \reg1, [\g_ctxt, #CPU_GCR_EL1]
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msr_s SYS_GCR_EL1, \reg1
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.L__skip_switch\@:
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.endm
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.macro mte_switch_to_hyp g_ctxt, h_ctxt, reg1
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alternative_if_not ARM64_MTE
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b .L__skip_switch\@
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alternative_else_nop_endif
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mrs \reg1, hcr_el2
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tbz \reg1, #(HCR_ATA_SHIFT), .L__skip_switch\@
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mrs_s \reg1, SYS_RGSR_EL1
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str \reg1, [\g_ctxt, #CPU_RGSR_EL1]
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mrs_s \reg1, SYS_GCR_EL1
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str \reg1, [\g_ctxt, #CPU_GCR_EL1]
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ldr \reg1, [\h_ctxt, #CPU_RGSR_EL1]
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msr_s SYS_RGSR_EL1, \reg1
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ldr \reg1, [\h_ctxt, #CPU_GCR_EL1]
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msr_s SYS_GCR_EL1, \reg1
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isb
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.L__skip_switch\@:
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.endm
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#else /* !CONFIG_ARM64_MTE */
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.macro mte_switch_to_guest g_ctxt, h_ctxt, reg1
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.endm
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.macro mte_switch_to_hyp g_ctxt, h_ctxt, reg1
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.endm
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#endif /* CONFIG_ARM64_MTE */
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_KVM_MTE_H */
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