312 lines
4.7 KiB
C
312 lines
4.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef __SOC_TI_OMAP1_MUX_H
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#define __SOC_TI_OMAP1_MUX_H
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/*
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* This should not really be a global header, it reflects the
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* traditional way that omap1 does pin muxing without the
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* pinctrl subsystem.
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*/
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enum omap7xx_index {
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/* OMAP 730 keyboard */
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E2_7XX_KBR0,
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J7_7XX_KBR1,
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E1_7XX_KBR2,
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F3_7XX_KBR3,
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D2_7XX_KBR4,
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C2_7XX_KBC0,
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D3_7XX_KBC1,
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E4_7XX_KBC2,
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F4_7XX_KBC3,
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E3_7XX_KBC4,
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/* USB */
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AA17_7XX_USB_DM,
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W16_7XX_USB_PU_EN,
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W17_7XX_USB_VBUSI,
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W18_7XX_USB_DMCK_OUT,
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W19_7XX_USB_DCRST,
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/* MMC */
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MMC_7XX_CMD,
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MMC_7XX_CLK,
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MMC_7XX_DAT0,
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/* I2C */
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I2C_7XX_SCL,
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I2C_7XX_SDA,
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/* SPI */
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SPI_7XX_1,
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SPI_7XX_2,
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SPI_7XX_3,
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SPI_7XX_4,
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SPI_7XX_5,
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SPI_7XX_6,
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/* UART */
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UART_7XX_1,
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UART_7XX_2,
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};
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enum omap1xxx_index {
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/* UART1 (BT_UART_GATING)*/
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UART1_TX = 0,
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UART1_RTS,
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/* UART2 (COM_UART_GATING)*/
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UART2_TX,
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UART2_RX,
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UART2_CTS,
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UART2_RTS,
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/* UART3 (GIGA_UART_GATING) */
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UART3_TX,
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UART3_RX,
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UART3_CTS,
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UART3_RTS,
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UART3_CLKREQ,
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UART3_BCLK, /* 12MHz clock out */
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Y15_1610_UART3_RTS,
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/* PWT & PWL */
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PWT,
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PWL,
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/* USB master generic */
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R18_USB_VBUS,
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R18_1510_USB_GPIO0,
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W4_USB_PUEN,
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W4_USB_CLKO,
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W4_USB_HIGHZ,
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W4_GPIO58,
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/* USB1 master */
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USB1_SUSP,
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USB1_SEO,
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W13_1610_USB1_SE0,
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USB1_TXEN,
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USB1_TXD,
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USB1_VP,
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USB1_VM,
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USB1_RCV,
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USB1_SPEED,
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R13_1610_USB1_SPEED,
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R13_1710_USB1_SE0,
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/* USB2 master */
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USB2_SUSP,
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USB2_VP,
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USB2_TXEN,
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USB2_VM,
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USB2_RCV,
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USB2_SEO,
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USB2_TXD,
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/* OMAP-1510 GPIO */
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R18_1510_GPIO0,
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R19_1510_GPIO1,
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M14_1510_GPIO2,
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/* OMAP1610 GPIO */
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P18_1610_GPIO3,
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Y15_1610_GPIO17,
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/* OMAP-1710 GPIO */
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R18_1710_GPIO0,
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V2_1710_GPIO10,
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N21_1710_GPIO14,
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W15_1710_GPIO40,
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/* MPUIO */
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MPUIO2,
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N15_1610_MPUIO2,
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MPUIO4,
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MPUIO5,
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T20_1610_MPUIO5,
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W11_1610_MPUIO6,
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V10_1610_MPUIO7,
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W11_1610_MPUIO9,
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V10_1610_MPUIO10,
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W10_1610_MPUIO11,
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E20_1610_MPUIO13,
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U20_1610_MPUIO14,
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E19_1610_MPUIO15,
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/* MCBSP2 */
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MCBSP2_CLKR,
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MCBSP2_CLKX,
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MCBSP2_DR,
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MCBSP2_DX,
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MCBSP2_FSR,
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MCBSP2_FSX,
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/* MCBSP3 */
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MCBSP3_CLKX,
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/* Misc ballouts */
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BALLOUT_V8_ARMIO3,
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N20_HDQ,
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/* OMAP-1610 MMC2 */
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W8_1610_MMC2_DAT0,
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V8_1610_MMC2_DAT1,
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W15_1610_MMC2_DAT2,
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R10_1610_MMC2_DAT3,
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Y10_1610_MMC2_CLK,
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Y8_1610_MMC2_CMD,
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V9_1610_MMC2_CMDDIR,
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V5_1610_MMC2_DATDIR0,
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W19_1610_MMC2_DATDIR1,
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R18_1610_MMC2_CLKIN,
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/* OMAP-1610 External Trace Interface */
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M19_1610_ETM_PSTAT0,
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L15_1610_ETM_PSTAT1,
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L18_1610_ETM_PSTAT2,
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L19_1610_ETM_D0,
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J19_1610_ETM_D6,
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J18_1610_ETM_D7,
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/* OMAP16XX GPIO */
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P20_1610_GPIO4,
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V9_1610_GPIO7,
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W8_1610_GPIO9,
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N20_1610_GPIO11,
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N19_1610_GPIO13,
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P10_1610_GPIO22,
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V5_1610_GPIO24,
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AA20_1610_GPIO_41,
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W19_1610_GPIO48,
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M7_1610_GPIO62,
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V14_16XX_GPIO37,
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R9_16XX_GPIO18,
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L14_16XX_GPIO49,
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/* OMAP-1610 uWire */
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V19_1610_UWIRE_SCLK,
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U18_1610_UWIRE_SDI,
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W21_1610_UWIRE_SDO,
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N14_1610_UWIRE_CS0,
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P15_1610_UWIRE_CS3,
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N15_1610_UWIRE_CS1,
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/* OMAP-1610 SPI */
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U19_1610_SPIF_SCK,
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U18_1610_SPIF_DIN,
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P20_1610_SPIF_DIN,
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W21_1610_SPIF_DOUT,
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R18_1610_SPIF_DOUT,
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N14_1610_SPIF_CS0,
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N15_1610_SPIF_CS1,
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T19_1610_SPIF_CS2,
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P15_1610_SPIF_CS3,
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/* OMAP-1610 Flash */
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L3_1610_FLASH_CS2B_OE,
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M8_1610_FLASH_CS2B_WE,
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/* First MMC */
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MMC_CMD,
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MMC_DAT1,
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MMC_DAT2,
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MMC_DAT0,
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MMC_CLK,
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MMC_DAT3,
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/* OMAP-1710 MMC CMDDIR and DATDIR0 */
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M15_1710_MMC_CLKI,
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P19_1710_MMC_CMDDIR,
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P20_1710_MMC_DATDIR0,
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/* OMAP-1610 USB0 alternate pin configuration */
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W9_USB0_TXEN,
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AA9_USB0_VP,
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Y5_USB0_RCV,
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R9_USB0_VM,
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V6_USB0_TXD,
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W5_USB0_SE0,
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V9_USB0_SPEED,
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V9_USB0_SUSP,
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/* USB2 */
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W9_USB2_TXEN,
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AA9_USB2_VP,
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Y5_USB2_RCV,
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R9_USB2_VM,
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V6_USB2_TXD,
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W5_USB2_SE0,
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/* 16XX UART */
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R13_1610_UART1_TX,
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V14_16XX_UART1_RX,
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R14_1610_UART1_CTS,
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AA15_1610_UART1_RTS,
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R9_16XX_UART2_RX,
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L14_16XX_UART3_RX,
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/* I2C OMAP-1610 */
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I2C_SCL,
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I2C_SDA,
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/* Keypad */
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F18_1610_KBC0,
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D20_1610_KBC1,
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D19_1610_KBC2,
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E18_1610_KBC3,
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C21_1610_KBC4,
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G18_1610_KBR0,
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F19_1610_KBR1,
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H14_1610_KBR2,
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E20_1610_KBR3,
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E19_1610_KBR4,
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N19_1610_KBR5,
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/* Power management */
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T20_1610_LOW_PWR,
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/* MCLK Settings */
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V5_1710_MCLK_ON,
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V5_1710_MCLK_OFF,
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R10_1610_MCLK_ON,
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R10_1610_MCLK_OFF,
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/* CompactFlash controller */
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P11_1610_CF_CD2,
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R11_1610_CF_IOIS16,
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V10_1610_CF_IREQ,
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W10_1610_CF_RESET,
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W11_1610_CF_CD1,
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/* parallel camera */
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J15_1610_CAM_LCLK,
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J18_1610_CAM_D7,
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J19_1610_CAM_D6,
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J14_1610_CAM_D5,
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K18_1610_CAM_D4,
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K19_1610_CAM_D3,
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K15_1610_CAM_D2,
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K14_1610_CAM_D1,
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L19_1610_CAM_D0,
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L18_1610_CAM_VS,
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L15_1610_CAM_HS,
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M19_1610_CAM_RSTZ,
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Y15_1610_CAM_OUTCLK,
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/* serial camera */
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H19_1610_CAM_EXCLK,
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Y12_1610_CCP_CLKP,
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W13_1610_CCP_CLKM,
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W14_1610_CCP_DATAP,
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Y14_1610_CCP_DATAM,
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};
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#ifdef CONFIG_OMAP_MUX
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extern int omap_cfg_reg(unsigned long reg_cfg);
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#else
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static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; }
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#endif
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#endif
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