587 lines
15 KiB
C
587 lines
15 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2004,2007,2008 IBM Corporation
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*
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* Authors:
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* Leendert van Doorn <leendert@watson.ibm.com>
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* Dave Safford <safford@watson.ibm.com>
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* Reiner Sailer <sailer@watson.ibm.com>
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* Kylene Hall <kjhall@us.ibm.com>
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* Debora Velarde <dvelarde@us.ibm.com>
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*
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* Maintained by: <tpmdd_devel@lists.sourceforge.net>
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*
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* Device driver for TCG/TCPA TPM (trusted platform module).
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* Specifications at www.trustedcomputinggroup.org
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*/
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#ifndef __LINUX_TPM_H__
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#define __LINUX_TPM_H__
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#include <linux/hw_random.h>
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#include <linux/acpi.h>
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#include <linux/cdev.h>
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#include <linux/fs.h>
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#include <linux/highmem.h>
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#include <crypto/hash_info.h>
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#include <crypto/aes.h>
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#define TPM_DIGEST_SIZE 20 /* Max TPM v1.2 PCR size */
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#define TPM_MAX_DIGEST_SIZE SHA512_DIGEST_SIZE
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struct tpm_chip;
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struct trusted_key_payload;
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struct trusted_key_options;
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/* opaque structure, holds auth session parameters like the session key */
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struct tpm2_auth;
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enum tpm2_session_types {
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TPM2_SE_HMAC = 0x00,
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TPM2_SE_POLICY = 0x01,
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TPM2_SE_TRIAL = 0x02,
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};
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/* if you add a new hash to this, increment TPM_MAX_HASHES below */
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enum tpm_algorithms {
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TPM_ALG_ERROR = 0x0000,
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TPM_ALG_SHA1 = 0x0004,
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TPM_ALG_AES = 0x0006,
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TPM_ALG_KEYEDHASH = 0x0008,
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TPM_ALG_SHA256 = 0x000B,
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TPM_ALG_SHA384 = 0x000C,
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TPM_ALG_SHA512 = 0x000D,
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TPM_ALG_NULL = 0x0010,
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TPM_ALG_SM3_256 = 0x0012,
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TPM_ALG_ECC = 0x0023,
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TPM_ALG_CFB = 0x0043,
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};
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/*
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* maximum number of hashing algorithms a TPM can have. This is
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* basically a count of every hash in tpm_algorithms above
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*/
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#define TPM_MAX_HASHES 5
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enum tpm2_curves {
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TPM2_ECC_NONE = 0x0000,
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TPM2_ECC_NIST_P256 = 0x0003,
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};
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struct tpm_digest {
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u16 alg_id;
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u8 digest[TPM_MAX_DIGEST_SIZE];
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} __packed;
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struct tpm_bank_info {
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u16 alg_id;
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u16 digest_size;
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u16 crypto_id;
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};
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enum TPM_OPS_FLAGS {
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TPM_OPS_AUTO_STARTUP = BIT(0),
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};
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struct tpm_class_ops {
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unsigned int flags;
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const u8 req_complete_mask;
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const u8 req_complete_val;
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bool (*req_canceled)(struct tpm_chip *chip, u8 status);
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int (*recv) (struct tpm_chip *chip, u8 *buf, size_t len);
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int (*send) (struct tpm_chip *chip, u8 *buf, size_t len);
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void (*cancel) (struct tpm_chip *chip);
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u8 (*status) (struct tpm_chip *chip);
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void (*update_timeouts)(struct tpm_chip *chip,
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unsigned long *timeout_cap);
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void (*update_durations)(struct tpm_chip *chip,
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unsigned long *duration_cap);
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int (*go_idle)(struct tpm_chip *chip);
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int (*cmd_ready)(struct tpm_chip *chip);
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int (*request_locality)(struct tpm_chip *chip, int loc);
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int (*relinquish_locality)(struct tpm_chip *chip, int loc);
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void (*clk_enable)(struct tpm_chip *chip, bool value);
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};
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#define TPM_NUM_EVENT_LOG_FILES 3
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/* Indexes the duration array */
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enum tpm_duration {
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TPM_SHORT = 0,
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TPM_MEDIUM = 1,
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TPM_LONG = 2,
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TPM_LONG_LONG = 3,
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TPM_UNDEFINED,
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TPM_NUM_DURATIONS = TPM_UNDEFINED,
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};
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#define TPM_PPI_VERSION_LEN 3
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struct tpm_space {
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u32 context_tbl[3];
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u8 *context_buf;
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u32 session_tbl[3];
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u8 *session_buf;
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u32 buf_size;
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};
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struct tpm_bios_log {
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void *bios_event_log;
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void *bios_event_log_end;
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};
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struct tpm_chip_seqops {
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struct tpm_chip *chip;
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const struct seq_operations *seqops;
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};
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/* fixed define for the curve we use which is NIST_P256 */
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#define EC_PT_SZ 32
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/*
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* fixed define for the size of a name. This is actually HASHALG size
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* plus 2, so 32 for SHA256
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*/
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#define TPM2_NAME_SIZE 34
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/*
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* The maximum size for an object context
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*/
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#define TPM2_MAX_CONTEXT_SIZE 4096
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struct tpm_chip {
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struct device dev;
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struct device devs;
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struct cdev cdev;
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struct cdev cdevs;
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/* A driver callback under ops cannot be run unless ops_sem is held
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* (sometimes implicitly, eg for the sysfs code). ops becomes null
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* when the driver is unregistered, see tpm_try_get_ops.
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*/
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struct rw_semaphore ops_sem;
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const struct tpm_class_ops *ops;
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struct tpm_bios_log log;
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struct tpm_chip_seqops bin_log_seqops;
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struct tpm_chip_seqops ascii_log_seqops;
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unsigned int flags;
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int dev_num; /* /dev/tpm# */
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unsigned long is_open; /* only one allowed */
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char hwrng_name[64];
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struct hwrng hwrng;
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struct mutex tpm_mutex; /* tpm is processing */
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unsigned long timeout_a; /* jiffies */
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unsigned long timeout_b; /* jiffies */
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unsigned long timeout_c; /* jiffies */
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unsigned long timeout_d; /* jiffies */
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bool timeout_adjusted;
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unsigned long duration[TPM_NUM_DURATIONS]; /* jiffies */
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bool duration_adjusted;
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struct dentry *bios_dir[TPM_NUM_EVENT_LOG_FILES];
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const struct attribute_group *groups[3 + TPM_MAX_HASHES];
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unsigned int groups_cnt;
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u32 nr_allocated_banks;
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struct tpm_bank_info *allocated_banks;
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#ifdef CONFIG_ACPI
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acpi_handle acpi_dev_handle;
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char ppi_version[TPM_PPI_VERSION_LEN + 1];
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#endif /* CONFIG_ACPI */
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struct tpm_space work_space;
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u32 last_cc;
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u32 nr_commands;
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u32 *cc_attrs_tbl;
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/* active locality */
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int locality;
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#ifdef CONFIG_TCG_TPM2_HMAC
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/* details for communication security via sessions */
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/* saved context for NULL seed */
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u8 null_key_context[TPM2_MAX_CONTEXT_SIZE];
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/* name of NULL seed */
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u8 null_key_name[TPM2_NAME_SIZE];
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u8 null_ec_key_x[EC_PT_SZ];
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u8 null_ec_key_y[EC_PT_SZ];
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struct tpm2_auth *auth;
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#endif
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};
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#define TPM_HEADER_SIZE 10
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enum tpm2_const {
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TPM2_PLATFORM_PCR = 24,
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TPM2_PCR_SELECT_MIN = ((TPM2_PLATFORM_PCR + 7) / 8),
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};
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enum tpm2_timeouts {
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TPM2_TIMEOUT_A = 750,
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TPM2_TIMEOUT_B = 2000,
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TPM2_TIMEOUT_C = 200,
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TPM2_TIMEOUT_D = 30,
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TPM2_DURATION_SHORT = 20,
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TPM2_DURATION_MEDIUM = 750,
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TPM2_DURATION_LONG = 2000,
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TPM2_DURATION_LONG_LONG = 300000,
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TPM2_DURATION_DEFAULT = 120000,
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};
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enum tpm2_structures {
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TPM2_ST_NO_SESSIONS = 0x8001,
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TPM2_ST_SESSIONS = 0x8002,
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TPM2_ST_CREATION = 0x8021,
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};
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/* Indicates from what layer of the software stack the error comes from */
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#define TSS2_RC_LAYER_SHIFT 16
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#define TSS2_RESMGR_TPM_RC_LAYER (11 << TSS2_RC_LAYER_SHIFT)
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enum tpm2_return_codes {
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TPM2_RC_SUCCESS = 0x0000,
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TPM2_RC_HASH = 0x0083, /* RC_FMT1 */
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TPM2_RC_HANDLE = 0x008B,
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TPM2_RC_INTEGRITY = 0x009F,
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TPM2_RC_INITIALIZE = 0x0100, /* RC_VER1 */
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TPM2_RC_FAILURE = 0x0101,
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TPM2_RC_DISABLED = 0x0120,
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TPM2_RC_UPGRADE = 0x012D,
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TPM2_RC_COMMAND_CODE = 0x0143,
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TPM2_RC_TESTING = 0x090A, /* RC_WARN */
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TPM2_RC_REFERENCE_H0 = 0x0910,
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TPM2_RC_RETRY = 0x0922,
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};
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enum tpm2_command_codes {
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TPM2_CC_FIRST = 0x011F,
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TPM2_CC_HIERARCHY_CONTROL = 0x0121,
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TPM2_CC_HIERARCHY_CHANGE_AUTH = 0x0129,
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TPM2_CC_CREATE_PRIMARY = 0x0131,
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TPM2_CC_SEQUENCE_COMPLETE = 0x013E,
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TPM2_CC_SELF_TEST = 0x0143,
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TPM2_CC_STARTUP = 0x0144,
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TPM2_CC_SHUTDOWN = 0x0145,
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TPM2_CC_NV_READ = 0x014E,
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TPM2_CC_CREATE = 0x0153,
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TPM2_CC_LOAD = 0x0157,
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TPM2_CC_SEQUENCE_UPDATE = 0x015C,
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TPM2_CC_UNSEAL = 0x015E,
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TPM2_CC_CONTEXT_LOAD = 0x0161,
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TPM2_CC_CONTEXT_SAVE = 0x0162,
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TPM2_CC_FLUSH_CONTEXT = 0x0165,
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TPM2_CC_READ_PUBLIC = 0x0173,
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TPM2_CC_START_AUTH_SESS = 0x0176,
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TPM2_CC_VERIFY_SIGNATURE = 0x0177,
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TPM2_CC_GET_CAPABILITY = 0x017A,
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TPM2_CC_GET_RANDOM = 0x017B,
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TPM2_CC_PCR_READ = 0x017E,
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TPM2_CC_PCR_EXTEND = 0x0182,
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TPM2_CC_EVENT_SEQUENCE_COMPLETE = 0x0185,
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TPM2_CC_HASH_SEQUENCE_START = 0x0186,
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TPM2_CC_CREATE_LOADED = 0x0191,
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TPM2_CC_LAST = 0x0193, /* Spec 1.36 */
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};
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enum tpm2_permanent_handles {
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TPM2_RH_NULL = 0x40000007,
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TPM2_RS_PW = 0x40000009,
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};
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/* Most Significant Octet for key types */
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enum tpm2_mso_type {
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TPM2_MSO_NVRAM = 0x01,
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TPM2_MSO_SESSION = 0x02,
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TPM2_MSO_POLICY = 0x03,
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TPM2_MSO_PERMANENT = 0x40,
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TPM2_MSO_VOLATILE = 0x80,
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TPM2_MSO_PERSISTENT = 0x81,
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};
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static inline enum tpm2_mso_type tpm2_handle_mso(u32 handle)
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{
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return handle >> 24;
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}
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enum tpm2_capabilities {
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TPM2_CAP_HANDLES = 1,
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TPM2_CAP_COMMANDS = 2,
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TPM2_CAP_PCRS = 5,
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TPM2_CAP_TPM_PROPERTIES = 6,
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};
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enum tpm2_properties {
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TPM_PT_TOTAL_COMMANDS = 0x0129,
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};
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enum tpm2_startup_types {
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TPM2_SU_CLEAR = 0x0000,
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TPM2_SU_STATE = 0x0001,
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};
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enum tpm2_cc_attrs {
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TPM2_CC_ATTR_CHANDLES = 25,
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TPM2_CC_ATTR_RHANDLE = 28,
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TPM2_CC_ATTR_VENDOR = 29,
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};
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#define TPM_VID_INTEL 0x8086
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#define TPM_VID_WINBOND 0x1050
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#define TPM_VID_STM 0x104A
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#define TPM_VID_ATML 0x1114
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enum tpm_chip_flags {
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TPM_CHIP_FLAG_BOOTSTRAPPED = BIT(0),
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TPM_CHIP_FLAG_TPM2 = BIT(1),
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TPM_CHIP_FLAG_IRQ = BIT(2),
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TPM_CHIP_FLAG_VIRTUAL = BIT(3),
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TPM_CHIP_FLAG_HAVE_TIMEOUTS = BIT(4),
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TPM_CHIP_FLAG_ALWAYS_POWERED = BIT(5),
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TPM_CHIP_FLAG_FIRMWARE_POWER_MANAGED = BIT(6),
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TPM_CHIP_FLAG_FIRMWARE_UPGRADE = BIT(7),
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TPM_CHIP_FLAG_SUSPENDED = BIT(8),
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TPM_CHIP_FLAG_HWRNG_DISABLED = BIT(9),
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TPM_CHIP_FLAG_DISABLE = BIT(10),
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};
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#define to_tpm_chip(d) container_of(d, struct tpm_chip, dev)
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struct tpm_header {
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__be16 tag;
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__be32 length;
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union {
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__be32 ordinal;
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__be32 return_code;
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};
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} __packed;
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enum tpm_buf_flags {
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/* the capacity exceeded: */
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TPM_BUF_OVERFLOW = BIT(0),
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/* TPM2B format: */
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TPM_BUF_TPM2B = BIT(1),
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/* read out of boundary: */
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TPM_BUF_BOUNDARY_ERROR = BIT(2),
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};
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/*
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* A string buffer type for constructing TPM commands.
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*/
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struct tpm_buf {
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u32 flags;
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u32 length;
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u8 *data;
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u8 handles;
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};
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enum tpm2_object_attributes {
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TPM2_OA_FIXED_TPM = BIT(1),
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TPM2_OA_ST_CLEAR = BIT(2),
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TPM2_OA_FIXED_PARENT = BIT(4),
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TPM2_OA_SENSITIVE_DATA_ORIGIN = BIT(5),
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TPM2_OA_USER_WITH_AUTH = BIT(6),
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TPM2_OA_ADMIN_WITH_POLICY = BIT(7),
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TPM2_OA_NO_DA = BIT(10),
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TPM2_OA_ENCRYPTED_DUPLICATION = BIT(11),
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TPM2_OA_RESTRICTED = BIT(16),
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TPM2_OA_DECRYPT = BIT(17),
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TPM2_OA_SIGN = BIT(18),
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};
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enum tpm2_session_attributes {
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TPM2_SA_CONTINUE_SESSION = BIT(0),
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TPM2_SA_AUDIT_EXCLUSIVE = BIT(1),
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TPM2_SA_AUDIT_RESET = BIT(3),
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TPM2_SA_DECRYPT = BIT(5),
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TPM2_SA_ENCRYPT = BIT(6),
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TPM2_SA_AUDIT = BIT(7),
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};
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struct tpm2_hash {
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unsigned int crypto_id;
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unsigned int tpm_id;
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};
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int tpm_buf_init(struct tpm_buf *buf, u16 tag, u32 ordinal);
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void tpm_buf_reset(struct tpm_buf *buf, u16 tag, u32 ordinal);
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int tpm_buf_init_sized(struct tpm_buf *buf);
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void tpm_buf_reset_sized(struct tpm_buf *buf);
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void tpm_buf_destroy(struct tpm_buf *buf);
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u32 tpm_buf_length(struct tpm_buf *buf);
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void tpm_buf_append(struct tpm_buf *buf, const u8 *new_data, u16 new_length);
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void tpm_buf_append_u8(struct tpm_buf *buf, const u8 value);
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void tpm_buf_append_u16(struct tpm_buf *buf, const u16 value);
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void tpm_buf_append_u32(struct tpm_buf *buf, const u32 value);
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u8 tpm_buf_read_u8(struct tpm_buf *buf, off_t *offset);
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u16 tpm_buf_read_u16(struct tpm_buf *buf, off_t *offset);
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u32 tpm_buf_read_u32(struct tpm_buf *buf, off_t *offset);
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/*
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* Check if TPM device is in the firmware upgrade mode.
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*/
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static inline bool tpm_is_firmware_upgrade(struct tpm_chip *chip)
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{
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return chip->flags & TPM_CHIP_FLAG_FIRMWARE_UPGRADE;
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}
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static inline u32 tpm2_rc_value(u32 rc)
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{
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return (rc & BIT(7)) ? rc & 0xbf : rc;
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}
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#if defined(CONFIG_TCG_TPM) || defined(CONFIG_TCG_TPM_MODULE)
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extern int tpm_is_tpm2(struct tpm_chip *chip);
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extern __must_check int tpm_try_get_ops(struct tpm_chip *chip);
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extern void tpm_put_ops(struct tpm_chip *chip);
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extern ssize_t tpm_transmit_cmd(struct tpm_chip *chip, struct tpm_buf *buf,
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size_t min_rsp_body_length, const char *desc);
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extern int tpm_pcr_read(struct tpm_chip *chip, u32 pcr_idx,
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struct tpm_digest *digest);
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extern int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
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struct tpm_digest *digests);
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extern int tpm_get_random(struct tpm_chip *chip, u8 *data, size_t max);
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extern struct tpm_chip *tpm_default_chip(void);
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void tpm2_flush_context(struct tpm_chip *chip, u32 handle);
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static inline void tpm_buf_append_empty_auth(struct tpm_buf *buf, u32 handle)
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{
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/* simple authorization for empty auth */
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tpm_buf_append_u32(buf, 9); /* total length of auth */
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tpm_buf_append_u32(buf, handle);
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tpm_buf_append_u16(buf, 0); /* nonce len */
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tpm_buf_append_u8(buf, 0); /* attributes */
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tpm_buf_append_u16(buf, 0); /* hmac len */
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}
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#else
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|
static inline int tpm_is_tpm2(struct tpm_chip *chip)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
static inline int tpm_pcr_read(struct tpm_chip *chip, int pcr_idx,
|
|
struct tpm_digest *digest)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
|
|
struct tpm_digest *digests)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline int tpm_get_random(struct tpm_chip *chip, u8 *data, size_t max)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline struct tpm_chip *tpm_default_chip(void)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
static inline void tpm_buf_append_empty_auth(struct tpm_buf *buf, u32 handle)
|
|
{
|
|
}
|
|
#endif
|
|
#ifdef CONFIG_TCG_TPM2_HMAC
|
|
|
|
int tpm2_start_auth_session(struct tpm_chip *chip);
|
|
void tpm_buf_append_name(struct tpm_chip *chip, struct tpm_buf *buf,
|
|
u32 handle, u8 *name);
|
|
void tpm_buf_append_hmac_session(struct tpm_chip *chip, struct tpm_buf *buf,
|
|
u8 attributes, u8 *passphrase,
|
|
int passphraselen);
|
|
static inline void tpm_buf_append_hmac_session_opt(struct tpm_chip *chip,
|
|
struct tpm_buf *buf,
|
|
u8 attributes,
|
|
u8 *passphrase,
|
|
int passphraselen)
|
|
{
|
|
tpm_buf_append_hmac_session(chip, buf, attributes, passphrase,
|
|
passphraselen);
|
|
}
|
|
void tpm_buf_fill_hmac_session(struct tpm_chip *chip, struct tpm_buf *buf);
|
|
int tpm_buf_check_hmac_response(struct tpm_chip *chip, struct tpm_buf *buf,
|
|
int rc);
|
|
void tpm2_end_auth_session(struct tpm_chip *chip);
|
|
#else
|
|
#include <asm/unaligned.h>
|
|
|
|
static inline int tpm2_start_auth_session(struct tpm_chip *chip)
|
|
{
|
|
return 0;
|
|
}
|
|
static inline void tpm2_end_auth_session(struct tpm_chip *chip)
|
|
{
|
|
}
|
|
static inline void tpm_buf_append_name(struct tpm_chip *chip,
|
|
struct tpm_buf *buf,
|
|
u32 handle, u8 *name)
|
|
{
|
|
tpm_buf_append_u32(buf, handle);
|
|
/* count the number of handles in the upper bits of flags */
|
|
buf->handles++;
|
|
}
|
|
static inline void tpm_buf_append_hmac_session(struct tpm_chip *chip,
|
|
struct tpm_buf *buf,
|
|
u8 attributes, u8 *passphrase,
|
|
int passphraselen)
|
|
{
|
|
/* offset tells us where the sessions area begins */
|
|
int offset = buf->handles * 4 + TPM_HEADER_SIZE;
|
|
u32 len = 9 + passphraselen;
|
|
|
|
if (tpm_buf_length(buf) != offset) {
|
|
/* not the first session so update the existing length */
|
|
len += get_unaligned_be32(&buf->data[offset]);
|
|
put_unaligned_be32(len, &buf->data[offset]);
|
|
} else {
|
|
tpm_buf_append_u32(buf, len);
|
|
}
|
|
/* auth handle */
|
|
tpm_buf_append_u32(buf, TPM2_RS_PW);
|
|
/* nonce */
|
|
tpm_buf_append_u16(buf, 0);
|
|
/* attributes */
|
|
tpm_buf_append_u8(buf, 0);
|
|
/* passphrase */
|
|
tpm_buf_append_u16(buf, passphraselen);
|
|
tpm_buf_append(buf, passphrase, passphraselen);
|
|
}
|
|
static inline void tpm_buf_append_hmac_session_opt(struct tpm_chip *chip,
|
|
struct tpm_buf *buf,
|
|
u8 attributes,
|
|
u8 *passphrase,
|
|
int passphraselen)
|
|
{
|
|
int offset = buf->handles * 4 + TPM_HEADER_SIZE;
|
|
struct tpm_header *head = (struct tpm_header *) buf->data;
|
|
|
|
/*
|
|
* if the only sessions are optional, the command tag
|
|
* must change to TPM2_ST_NO_SESSIONS
|
|
*/
|
|
if (tpm_buf_length(buf) == offset)
|
|
head->tag = cpu_to_be16(TPM2_ST_NO_SESSIONS);
|
|
}
|
|
static inline void tpm_buf_fill_hmac_session(struct tpm_chip *chip,
|
|
struct tpm_buf *buf)
|
|
{
|
|
}
|
|
static inline int tpm_buf_check_hmac_response(struct tpm_chip *chip,
|
|
struct tpm_buf *buf,
|
|
int rc)
|
|
{
|
|
return rc;
|
|
}
|
|
#endif /* CONFIG_TCG_TPM2_HMAC */
|
|
|
|
#endif
|