285 lines
6.1 KiB
C
285 lines
6.1 KiB
C
/*
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* BPA Internal Interrupt Controller
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*
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* (C) Copyright IBM Deutschland Entwicklung GmbH 2005
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*
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* Author: Arnd Bergmann <arndb@de.ibm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/config.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/percpu.h>
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#include <linux/types.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/prom.h>
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#include <asm/ptrace.h>
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#include "bpa_iic.h"
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struct iic_pending_bits {
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u32 data;
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u8 flags;
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u8 class;
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u8 source;
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u8 prio;
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};
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enum iic_pending_flags {
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IIC_VALID = 0x80,
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IIC_IPI = 0x40,
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};
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struct iic_regs {
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struct iic_pending_bits pending;
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struct iic_pending_bits pending_destr;
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u64 generate;
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u64 prio;
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};
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struct iic {
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struct iic_regs __iomem *regs;
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};
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static DEFINE_PER_CPU(struct iic, iic);
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void iic_local_enable(void)
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{
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out_be64(&__get_cpu_var(iic).regs->prio, 0xff);
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}
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void iic_local_disable(void)
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{
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out_be64(&__get_cpu_var(iic).regs->prio, 0x0);
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}
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static unsigned int iic_startup(unsigned int irq)
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{
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return 0;
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}
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static void iic_enable(unsigned int irq)
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{
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iic_local_enable();
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}
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static void iic_disable(unsigned int irq)
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{
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}
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static void iic_end(unsigned int irq)
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{
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iic_local_enable();
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}
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static struct hw_interrupt_type iic_pic = {
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.typename = " BPA-IIC ",
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.startup = iic_startup,
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.enable = iic_enable,
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.disable = iic_disable,
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.end = iic_end,
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};
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static int iic_external_get_irq(struct iic_pending_bits pending)
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{
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int irq;
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unsigned char node, unit;
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node = pending.source >> 4;
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unit = pending.source & 0xf;
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irq = -1;
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/*
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* This mapping is specific to the Broadband
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* Engine. We might need to get the numbers
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* from the device tree to support future CPUs.
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*/
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switch (unit) {
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case 0x00:
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case 0x0b:
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/*
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* One of these units can be connected
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* to an external interrupt controller.
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*/
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if (pending.prio > 0x3f ||
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pending.class != 2)
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break;
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irq = IIC_EXT_OFFSET
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+ spider_get_irq(pending.prio + node * IIC_NODE_STRIDE)
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+ node * IIC_NODE_STRIDE;
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break;
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case 0x01 ... 0x04:
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case 0x07 ... 0x0a:
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/*
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* These units are connected to the SPEs
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*/
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if (pending.class > 2)
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break;
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irq = IIC_SPE_OFFSET
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+ pending.class * IIC_CLASS_STRIDE
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+ node * IIC_NODE_STRIDE
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+ unit;
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break;
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}
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if (irq == -1)
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printk(KERN_WARNING "Unexpected interrupt class %02x, "
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"source %02x, prio %02x, cpu %02x\n", pending.class,
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pending.source, pending.prio, smp_processor_id());
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return irq;
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}
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/* Get an IRQ number from the pending state register of the IIC */
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int iic_get_irq(struct pt_regs *regs)
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{
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struct iic *iic;
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int irq;
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struct iic_pending_bits pending;
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iic = &__get_cpu_var(iic);
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*(unsigned long *) &pending =
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in_be64((unsigned long __iomem *) &iic->regs->pending_destr);
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irq = -1;
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if (pending.flags & IIC_VALID) {
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if (pending.flags & IIC_IPI) {
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irq = IIC_IPI_OFFSET + (pending.prio >> 4);
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/*
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if (irq > 0x80)
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printk(KERN_WARNING "Unexpected IPI prio %02x"
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"on CPU %02x\n", pending.prio,
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smp_processor_id());
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*/
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} else {
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irq = iic_external_get_irq(pending);
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}
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}
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return irq;
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}
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static struct iic_regs __iomem *find_iic(int cpu)
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{
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struct device_node *np;
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int nodeid = cpu / 2;
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unsigned long regs;
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struct iic_regs __iomem *iic_regs;
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for (np = of_find_node_by_type(NULL, "cpu");
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np;
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np = of_find_node_by_type(np, "cpu")) {
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if (nodeid == *(int *)get_property(np, "node-id", NULL))
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break;
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}
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if (!np) {
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printk(KERN_WARNING "IIC: CPU %d not found\n", cpu);
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iic_regs = NULL;
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} else {
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regs = *(long *)get_property(np, "iic", NULL);
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/* hack until we have decided on the devtree info */
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regs += 0x400;
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if (cpu & 1)
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regs += 0x20;
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printk(KERN_DEBUG "IIC for CPU %d at %lx\n", cpu, regs);
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iic_regs = __ioremap(regs, sizeof(struct iic_regs),
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_PAGE_NO_CACHE);
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}
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return iic_regs;
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}
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#ifdef CONFIG_SMP
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/* Use the highest interrupt priorities for IPI */
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static inline int iic_ipi_to_irq(int ipi)
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{
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return IIC_IPI_OFFSET + IIC_NUM_IPIS - 1 - ipi;
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}
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static inline int iic_irq_to_ipi(int irq)
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{
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return IIC_NUM_IPIS - 1 - (irq - IIC_IPI_OFFSET);
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}
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void iic_setup_cpu(void)
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{
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out_be64(&__get_cpu_var(iic).regs->prio, 0xff);
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}
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void iic_cause_IPI(int cpu, int mesg)
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{
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out_be64(&per_cpu(iic, cpu).regs->generate, (IIC_NUM_IPIS - 1 - mesg) << 4);
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}
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static irqreturn_t iic_ipi_action(int irq, void *dev_id, struct pt_regs *regs)
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{
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smp_message_recv(iic_irq_to_ipi(irq), regs);
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return IRQ_HANDLED;
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}
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static void iic_request_ipi(int ipi, const char *name)
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{
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int irq;
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irq = iic_ipi_to_irq(ipi);
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/* IPIs are marked SA_INTERRUPT as they must run with irqs
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* disabled */
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get_irq_desc(irq)->handler = &iic_pic;
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get_irq_desc(irq)->status |= IRQ_PER_CPU;
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request_irq(irq, iic_ipi_action, SA_INTERRUPT, name, NULL);
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}
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void iic_request_IPIs(void)
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{
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iic_request_ipi(PPC_MSG_CALL_FUNCTION, "IPI-call");
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iic_request_ipi(PPC_MSG_RESCHEDULE, "IPI-resched");
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#ifdef CONFIG_DEBUGGER
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iic_request_ipi(PPC_MSG_DEBUGGER_BREAK, "IPI-debug");
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#endif /* CONFIG_DEBUGGER */
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}
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#endif /* CONFIG_SMP */
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static void iic_setup_spe_handlers(void)
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{
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int be, isrc;
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/* Assume two threads per BE are present */
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for (be=0; be < num_present_cpus() / 2; be++) {
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for (isrc = 0; isrc < IIC_CLASS_STRIDE * 3; isrc++) {
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int irq = IIC_NODE_STRIDE * be + IIC_SPE_OFFSET + isrc;
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get_irq_desc(irq)->handler = &iic_pic;
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}
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}
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}
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void iic_init_IRQ(void)
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{
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int cpu, irq_offset;
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struct iic *iic;
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irq_offset = 0;
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for_each_cpu(cpu) {
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iic = &per_cpu(iic, cpu);
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iic->regs = find_iic(cpu);
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if (iic->regs)
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out_be64(&iic->regs->prio, 0xff);
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}
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iic_setup_spe_handlers();
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}
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