307 lines
7.8 KiB
C
307 lines
7.8 KiB
C
/*
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* Copyright (C) 2016 Broadcom
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/bcma/bcma.h>
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#include <linux/brcmphy.h>
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#include <linux/etherdevice.h>
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#include <linux/of_address.h>
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#include <linux/of_mdio.h>
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#include <linux/of_net.h>
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#include "bgmac.h"
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#define NICPM_PADRING_CFG 0x00000004
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#define NICPM_IOMUX_CTRL 0x00000008
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#define NICPM_PADRING_CFG_INIT_VAL 0x74000000
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#define NICPM_IOMUX_CTRL_INIT_VAL_AX 0x21880000
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#define NICPM_IOMUX_CTRL_INIT_VAL 0x3196e000
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#define NICPM_IOMUX_CTRL_SPD_SHIFT 10
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#define NICPM_IOMUX_CTRL_SPD_10M 0
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#define NICPM_IOMUX_CTRL_SPD_100M 1
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#define NICPM_IOMUX_CTRL_SPD_1000M 2
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static u32 platform_bgmac_read(struct bgmac *bgmac, u16 offset)
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{
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return readl(bgmac->plat.base + offset);
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}
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static void platform_bgmac_write(struct bgmac *bgmac, u16 offset, u32 value)
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{
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writel(value, bgmac->plat.base + offset);
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}
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static u32 platform_bgmac_idm_read(struct bgmac *bgmac, u16 offset)
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{
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return readl(bgmac->plat.idm_base + offset);
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}
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static void platform_bgmac_idm_write(struct bgmac *bgmac, u16 offset, u32 value)
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{
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writel(value, bgmac->plat.idm_base + offset);
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}
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static bool platform_bgmac_clk_enabled(struct bgmac *bgmac)
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{
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if (!bgmac->plat.idm_base)
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return true;
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if ((bgmac_idm_read(bgmac, BCMA_IOCTL) & BGMAC_CLK_EN) != BGMAC_CLK_EN)
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return false;
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if (bgmac_idm_read(bgmac, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
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return false;
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return true;
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}
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static void platform_bgmac_clk_enable(struct bgmac *bgmac, u32 flags)
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{
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u32 val;
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if (!bgmac->plat.idm_base)
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return;
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/* The Reset Control register only contains a single bit to show if the
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* controller is currently in reset. Do a sanity check here, just in
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* case the bootloader happened to leave the device in reset.
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*/
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val = bgmac_idm_read(bgmac, BCMA_RESET_CTL);
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if (val) {
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bgmac_idm_write(bgmac, BCMA_RESET_CTL, 0);
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bgmac_idm_read(bgmac, BCMA_RESET_CTL);
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udelay(1);
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}
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val = bgmac_idm_read(bgmac, BCMA_IOCTL);
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/* Some bits of BCMA_IOCTL set by HW/ATF and should not change */
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val |= flags & ~(BGMAC_AWCACHE | BGMAC_ARCACHE | BGMAC_AWUSER |
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BGMAC_ARUSER);
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val |= BGMAC_CLK_EN;
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bgmac_idm_write(bgmac, BCMA_IOCTL, val);
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bgmac_idm_read(bgmac, BCMA_IOCTL);
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udelay(1);
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}
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static void platform_bgmac_cco_ctl_maskset(struct bgmac *bgmac, u32 offset,
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u32 mask, u32 set)
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{
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/* This shouldn't be encountered */
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WARN_ON(1);
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}
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static u32 platform_bgmac_get_bus_clock(struct bgmac *bgmac)
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{
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/* This shouldn't be encountered */
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WARN_ON(1);
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return 0;
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}
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static void platform_bgmac_cmn_maskset32(struct bgmac *bgmac, u16 offset,
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u32 mask, u32 set)
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{
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/* This shouldn't be encountered */
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WARN_ON(1);
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}
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static void bgmac_nicpm_speed_set(struct net_device *net_dev)
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{
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struct bgmac *bgmac = netdev_priv(net_dev);
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u32 val;
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if (!bgmac->plat.nicpm_base)
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return;
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/* SET RGMII IO CONFIG */
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writel(NICPM_PADRING_CFG_INIT_VAL,
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bgmac->plat.nicpm_base + NICPM_PADRING_CFG);
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val = NICPM_IOMUX_CTRL_INIT_VAL;
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switch (bgmac->net_dev->phydev->speed) {
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default:
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netdev_err(net_dev, "Unsupported speed. Defaulting to 1000Mb\n");
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/* fall through */
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case SPEED_1000:
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val |= NICPM_IOMUX_CTRL_SPD_1000M << NICPM_IOMUX_CTRL_SPD_SHIFT;
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break;
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case SPEED_100:
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val |= NICPM_IOMUX_CTRL_SPD_100M << NICPM_IOMUX_CTRL_SPD_SHIFT;
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break;
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case SPEED_10:
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val |= NICPM_IOMUX_CTRL_SPD_10M << NICPM_IOMUX_CTRL_SPD_SHIFT;
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break;
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}
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writel(val, bgmac->plat.nicpm_base + NICPM_IOMUX_CTRL);
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bgmac_adjust_link(bgmac->net_dev);
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}
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static int platform_phy_connect(struct bgmac *bgmac)
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{
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struct phy_device *phy_dev;
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if (bgmac->plat.nicpm_base)
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phy_dev = of_phy_get_and_connect(bgmac->net_dev,
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bgmac->dev->of_node,
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bgmac_nicpm_speed_set);
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else
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phy_dev = of_phy_get_and_connect(bgmac->net_dev,
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bgmac->dev->of_node,
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bgmac_adjust_link);
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if (!phy_dev) {
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dev_err(bgmac->dev, "PHY connection failed\n");
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return -ENODEV;
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}
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return 0;
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}
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static int bgmac_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct bgmac *bgmac;
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struct resource *regs;
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const u8 *mac_addr;
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bgmac = bgmac_alloc(&pdev->dev);
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if (!bgmac)
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return -ENOMEM;
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platform_set_drvdata(pdev, bgmac);
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/* Set the features of the 4707 family */
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bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
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bgmac->feature_flags |= BGMAC_FEAT_NO_RESET;
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bgmac->feature_flags |= BGMAC_FEAT_CMDCFG_SR_REV4;
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bgmac->feature_flags |= BGMAC_FEAT_TX_MASK_SETUP;
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bgmac->feature_flags |= BGMAC_FEAT_RX_MASK_SETUP;
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bgmac->feature_flags |= BGMAC_FEAT_IDM_MASK;
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bgmac->dev = &pdev->dev;
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bgmac->dma_dev = &pdev->dev;
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mac_addr = of_get_mac_address(np);
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if (!IS_ERR(mac_addr))
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ether_addr_copy(bgmac->net_dev->dev_addr, mac_addr);
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else
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dev_warn(&pdev->dev, "MAC address not present in device tree\n");
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bgmac->irq = platform_get_irq(pdev, 0);
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if (bgmac->irq < 0) {
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dev_err(&pdev->dev, "Unable to obtain IRQ\n");
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return bgmac->irq;
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}
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regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "amac_base");
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if (!regs) {
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dev_err(&pdev->dev, "Unable to obtain base resource\n");
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return -EINVAL;
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}
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bgmac->plat.base = devm_ioremap_resource(&pdev->dev, regs);
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if (IS_ERR(bgmac->plat.base))
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return PTR_ERR(bgmac->plat.base);
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regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "idm_base");
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if (regs) {
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bgmac->plat.idm_base = devm_ioremap_resource(&pdev->dev, regs);
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if (IS_ERR(bgmac->plat.idm_base))
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return PTR_ERR(bgmac->plat.idm_base);
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bgmac->feature_flags &= ~BGMAC_FEAT_IDM_MASK;
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}
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regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nicpm_base");
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if (regs) {
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bgmac->plat.nicpm_base = devm_ioremap_resource(&pdev->dev,
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regs);
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if (IS_ERR(bgmac->plat.nicpm_base))
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return PTR_ERR(bgmac->plat.nicpm_base);
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}
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bgmac->read = platform_bgmac_read;
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bgmac->write = platform_bgmac_write;
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bgmac->idm_read = platform_bgmac_idm_read;
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bgmac->idm_write = platform_bgmac_idm_write;
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bgmac->clk_enabled = platform_bgmac_clk_enabled;
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bgmac->clk_enable = platform_bgmac_clk_enable;
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bgmac->cco_ctl_maskset = platform_bgmac_cco_ctl_maskset;
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bgmac->get_bus_clock = platform_bgmac_get_bus_clock;
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bgmac->cmn_maskset32 = platform_bgmac_cmn_maskset32;
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if (of_parse_phandle(np, "phy-handle", 0)) {
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bgmac->phy_connect = platform_phy_connect;
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} else {
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bgmac->phy_connect = bgmac_phy_connect_direct;
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bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500;
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}
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return bgmac_enet_probe(bgmac);
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}
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static int bgmac_remove(struct platform_device *pdev)
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{
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struct bgmac *bgmac = platform_get_drvdata(pdev);
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bgmac_enet_remove(bgmac);
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return 0;
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}
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#ifdef CONFIG_PM
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static int bgmac_suspend(struct device *dev)
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{
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struct bgmac *bgmac = dev_get_drvdata(dev);
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return bgmac_enet_suspend(bgmac);
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}
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static int bgmac_resume(struct device *dev)
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{
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struct bgmac *bgmac = dev_get_drvdata(dev);
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return bgmac_enet_resume(bgmac);
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}
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static const struct dev_pm_ops bgmac_pm_ops = {
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.suspend = bgmac_suspend,
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.resume = bgmac_resume
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};
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#define BGMAC_PM_OPS (&bgmac_pm_ops)
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#else
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#define BGMAC_PM_OPS NULL
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#endif /* CONFIG_PM */
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static const struct of_device_id bgmac_of_enet_match[] = {
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{.compatible = "brcm,amac",},
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{.compatible = "brcm,nsp-amac",},
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{.compatible = "brcm,ns2-amac",},
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{},
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};
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MODULE_DEVICE_TABLE(of, bgmac_of_enet_match);
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static struct platform_driver bgmac_enet_driver = {
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.driver = {
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.name = "bgmac-enet",
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.of_match_table = bgmac_of_enet_match,
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.pm = BGMAC_PM_OPS
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},
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.probe = bgmac_probe,
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.remove = bgmac_remove,
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};
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module_platform_driver(bgmac_enet_driver);
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MODULE_LICENSE("GPL");
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