37 lines
873 B
C
37 lines
873 B
C
/*
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* arch/sh/mm/tlb-sh3.c
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*
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* SH-3 specific TLB operations
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*
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* Copyright (C) 1999 Niibe Yutaka
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* Copyright (C) 2002 Paul Mundt
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*
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* Released under the terms of the GNU GPL v2.0.
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*/
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#include <linux/io.h>
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#include <asm/system.h>
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#include <asm/mmu_context.h>
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void __flush_tlb_page(unsigned long asid, unsigned long page)
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{
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unsigned long addr, data;
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int i, ways = MMU_NTLB_WAYS;
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/*
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* NOTE: PTEH.ASID should be set to this MM
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* _AND_ we need to write ASID to the array.
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*
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* It would be simple if we didn't need to set PTEH.ASID...
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*/
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addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000);
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data = (page & 0xfffe0000) | asid; /* VALID bit is off */
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if ((current_cpu_data.flags & CPU_HAS_MMU_PAGE_ASSOC)) {
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addr |= MMU_PAGE_ASSOC_BIT;
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ways = 1; /* we already know the way .. */
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}
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for (i = 0; i < ways; i++)
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ctrl_outl(data, addr + (i << 8));
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}
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