291 lines
7.0 KiB
C
291 lines
7.0 KiB
C
/*
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* net/dsa/mv88e6060.c - Driver for Marvell 88e6060 switch chips
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* Copyright (c) 2008-2009 Marvell Semiconductor
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/delay.h>
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#include <linux/jiffies.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/phy.h>
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#include <net/dsa.h>
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#include "mv88e6060.h"
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static int reg_read(struct dsa_switch *ds, int addr, int reg)
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{
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struct mv88e6060_priv *priv = ds->priv;
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return mdiobus_read_nested(priv->bus, priv->sw_addr + addr, reg);
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}
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#define REG_READ(addr, reg) \
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({ \
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int __ret; \
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\
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__ret = reg_read(ds, addr, reg); \
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if (__ret < 0) \
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return __ret; \
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__ret; \
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})
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static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val)
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{
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struct mv88e6060_priv *priv = ds->priv;
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return mdiobus_write_nested(priv->bus, priv->sw_addr + addr, reg, val);
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}
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#define REG_WRITE(addr, reg, val) \
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({ \
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int __ret; \
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\
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__ret = reg_write(ds, addr, reg, val); \
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if (__ret < 0) \
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return __ret; \
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})
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static const char *mv88e6060_get_name(struct mii_bus *bus, int sw_addr)
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{
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int ret;
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ret = mdiobus_read(bus, sw_addr + REG_PORT(0), PORT_SWITCH_ID);
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if (ret >= 0) {
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if (ret == PORT_SWITCH_ID_6060)
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return "Marvell 88E6060 (A0)";
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if (ret == PORT_SWITCH_ID_6060_R1 ||
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ret == PORT_SWITCH_ID_6060_R2)
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return "Marvell 88E6060 (B0)";
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if ((ret & PORT_SWITCH_ID_6060_MASK) == PORT_SWITCH_ID_6060)
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return "Marvell 88E6060";
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}
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return NULL;
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}
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static enum dsa_tag_protocol mv88e6060_get_tag_protocol(struct dsa_switch *ds)
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{
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return DSA_TAG_PROTO_TRAILER;
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}
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static const char *mv88e6060_drv_probe(struct device *dsa_dev,
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struct device *host_dev, int sw_addr,
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void **_priv)
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{
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struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);
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struct mv88e6060_priv *priv;
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const char *name;
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name = mv88e6060_get_name(bus, sw_addr);
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if (name) {
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priv = devm_kzalloc(dsa_dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return NULL;
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*_priv = priv;
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priv->bus = bus;
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priv->sw_addr = sw_addr;
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}
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return name;
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}
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static int mv88e6060_switch_reset(struct dsa_switch *ds)
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{
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int i;
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int ret;
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unsigned long timeout;
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/* Set all ports to the disabled state. */
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for (i = 0; i < MV88E6060_PORTS; i++) {
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ret = REG_READ(REG_PORT(i), PORT_CONTROL);
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REG_WRITE(REG_PORT(i), PORT_CONTROL,
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ret & ~PORT_CONTROL_STATE_MASK);
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}
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/* Wait for transmit queues to drain. */
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usleep_range(2000, 4000);
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/* Reset the switch. */
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REG_WRITE(REG_GLOBAL, GLOBAL_ATU_CONTROL,
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GLOBAL_ATU_CONTROL_SWRESET |
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GLOBAL_ATU_CONTROL_ATUSIZE_1024 |
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GLOBAL_ATU_CONTROL_ATE_AGE_5MIN);
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/* Wait up to one second for reset to complete. */
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timeout = jiffies + 1 * HZ;
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while (time_before(jiffies, timeout)) {
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ret = REG_READ(REG_GLOBAL, GLOBAL_STATUS);
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if (ret & GLOBAL_STATUS_INIT_READY)
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break;
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usleep_range(1000, 2000);
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}
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if (time_after(jiffies, timeout))
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return -ETIMEDOUT;
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return 0;
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}
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static int mv88e6060_setup_global(struct dsa_switch *ds)
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{
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/* Disable discarding of frames with excessive collisions,
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* set the maximum frame size to 1536 bytes, and mask all
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* interrupt sources.
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*/
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REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, GLOBAL_CONTROL_MAX_FRAME_1536);
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/* Enable automatic address learning, set the address
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* database size to 1024 entries, and set the default aging
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* time to 5 minutes.
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*/
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REG_WRITE(REG_GLOBAL, GLOBAL_ATU_CONTROL,
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GLOBAL_ATU_CONTROL_ATUSIZE_1024 |
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GLOBAL_ATU_CONTROL_ATE_AGE_5MIN);
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return 0;
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}
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static int mv88e6060_setup_port(struct dsa_switch *ds, int p)
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{
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int addr = REG_PORT(p);
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/* Do not force flow control, disable Ingress and Egress
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* Header tagging, disable VLAN tunneling, and set the port
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* state to Forwarding. Additionally, if this is the CPU
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* port, enable Ingress and Egress Trailer tagging mode.
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*/
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REG_WRITE(addr, PORT_CONTROL,
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dsa_is_cpu_port(ds, p) ?
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PORT_CONTROL_TRAILER |
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PORT_CONTROL_INGRESS_MODE |
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PORT_CONTROL_STATE_FORWARDING :
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PORT_CONTROL_STATE_FORWARDING);
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/* Port based VLAN map: give each port its own address
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* database, allow the CPU port to talk to each of the 'real'
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* ports, and allow each of the 'real' ports to only talk to
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* the CPU port.
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*/
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REG_WRITE(addr, PORT_VLAN_MAP,
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((p & 0xf) << PORT_VLAN_MAP_DBNUM_SHIFT) |
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(dsa_is_cpu_port(ds, p) ?
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ds->enabled_port_mask :
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BIT(ds->dst->cpu_dp->index)));
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/* Port Association Vector: when learning source addresses
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* of packets, add the address to the address database using
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* a port bitmap that has only the bit for this port set and
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* the other bits clear.
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*/
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REG_WRITE(addr, PORT_ASSOC_VECTOR, BIT(p));
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return 0;
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}
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static int mv88e6060_setup(struct dsa_switch *ds)
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{
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int ret;
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int i;
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ret = mv88e6060_switch_reset(ds);
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if (ret < 0)
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return ret;
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/* @@@ initialise atu */
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ret = mv88e6060_setup_global(ds);
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if (ret < 0)
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return ret;
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for (i = 0; i < MV88E6060_PORTS; i++) {
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ret = mv88e6060_setup_port(ds, i);
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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static int mv88e6060_set_addr(struct dsa_switch *ds, u8 *addr)
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{
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u16 val = addr[0] << 8 | addr[1];
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/* The multicast bit is always transmitted as a zero, so the switch uses
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* bit 8 for "DiffAddr", where 0 means all ports transmit the same SA.
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*/
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val &= 0xfeff;
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REG_WRITE(REG_GLOBAL, GLOBAL_MAC_01, val);
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REG_WRITE(REG_GLOBAL, GLOBAL_MAC_23, (addr[2] << 8) | addr[3]);
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REG_WRITE(REG_GLOBAL, GLOBAL_MAC_45, (addr[4] << 8) | addr[5]);
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return 0;
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}
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static int mv88e6060_port_to_phy_addr(int port)
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{
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if (port >= 0 && port < MV88E6060_PORTS)
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return port;
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return -1;
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}
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static int mv88e6060_phy_read(struct dsa_switch *ds, int port, int regnum)
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{
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int addr;
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addr = mv88e6060_port_to_phy_addr(port);
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if (addr == -1)
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return 0xffff;
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return reg_read(ds, addr, regnum);
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}
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static int
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mv88e6060_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
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{
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int addr;
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addr = mv88e6060_port_to_phy_addr(port);
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if (addr == -1)
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return 0xffff;
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return reg_write(ds, addr, regnum, val);
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}
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static const struct dsa_switch_ops mv88e6060_switch_ops = {
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.get_tag_protocol = mv88e6060_get_tag_protocol,
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.probe = mv88e6060_drv_probe,
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.setup = mv88e6060_setup,
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.set_addr = mv88e6060_set_addr,
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.phy_read = mv88e6060_phy_read,
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.phy_write = mv88e6060_phy_write,
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};
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static struct dsa_switch_driver mv88e6060_switch_drv = {
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.ops = &mv88e6060_switch_ops,
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};
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static int __init mv88e6060_init(void)
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{
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register_switch_driver(&mv88e6060_switch_drv);
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return 0;
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}
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module_init(mv88e6060_init);
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static void __exit mv88e6060_cleanup(void)
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{
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unregister_switch_driver(&mv88e6060_switch_drv);
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}
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module_exit(mv88e6060_cleanup);
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MODULE_AUTHOR("Lennert Buytenhek <buytenh@wantstofly.org>");
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MODULE_DESCRIPTION("Driver for Marvell 88E6060 ethernet switch chip");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:mv88e6060");
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