634 lines
16 KiB
C
634 lines
16 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1999,2001-2005 Silicon Graphics, Inc. All rights reserved.
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/kdev_t.h>
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#include <linux/string.h>
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#include <linux/tty.h>
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#include <linux/console.h>
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#include <linux/timex.h>
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#include <linux/sched.h>
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#include <linux/ioport.h>
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#include <linux/mm.h>
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#include <linux/serial.h>
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#include <linux/irq.h>
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#include <linux/bootmem.h>
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#include <linux/mmzone.h>
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#include <linux/interrupt.h>
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#include <linux/acpi.h>
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#include <linux/compiler.h>
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#include <linux/sched.h>
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#include <linux/root_dev.h>
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#include <linux/nodemask.h>
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#include <linux/pm.h>
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#include <asm/io.h>
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#include <asm/sal.h>
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#include <asm/machvec.h>
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#include <asm/system.h>
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#include <asm/processor.h>
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#include <asm/sn/arch.h>
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#include <asm/sn/addrs.h>
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#include <asm/sn/pda.h>
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#include <asm/sn/nodepda.h>
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#include <asm/sn/sn_cpuid.h>
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#include <asm/sn/simulator.h>
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#include <asm/sn/leds.h>
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#include <asm/sn/bte.h>
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#include <asm/sn/shub_mmr.h>
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#include <asm/sn/clksupport.h>
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#include <asm/sn/sn_sal.h>
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#include <asm/sn/geo.h>
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#include "xtalk/xwidgetdev.h"
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#include "xtalk/hubdev.h"
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#include <asm/sn/klconfig.h>
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DEFINE_PER_CPU(struct pda_s, pda_percpu);
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#define MAX_PHYS_MEMORY (1UL << 49) /* 1 TB */
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lboard_t *root_lboard[MAX_COMPACT_NODES];
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extern void bte_init_node(nodepda_t *, cnodeid_t);
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extern void sn_timer_init(void);
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extern unsigned long last_time_offset;
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extern void (*ia64_mark_idle) (int);
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extern void snidle(int);
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extern unsigned char acpi_kbd_controller_present;
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unsigned long sn_rtc_cycles_per_second;
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EXPORT_SYMBOL(sn_rtc_cycles_per_second);
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DEFINE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
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EXPORT_PER_CPU_SYMBOL(__sn_hub_info);
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DEFINE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]);
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EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid);
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partid_t sn_partid = -1;
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EXPORT_SYMBOL(sn_partid);
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char sn_system_serial_number_string[128];
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EXPORT_SYMBOL(sn_system_serial_number_string);
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u64 sn_partition_serial_number;
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EXPORT_SYMBOL(sn_partition_serial_number);
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u8 sn_partition_id;
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EXPORT_SYMBOL(sn_partition_id);
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u8 sn_system_size;
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EXPORT_SYMBOL(sn_system_size);
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u8 sn_sharing_domain_size;
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EXPORT_SYMBOL(sn_sharing_domain_size);
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u8 sn_coherency_id;
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EXPORT_SYMBOL(sn_coherency_id);
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u8 sn_region_size;
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EXPORT_SYMBOL(sn_region_size);
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short physical_node_map[MAX_PHYSNODE_ID];
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EXPORT_SYMBOL(physical_node_map);
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int numionodes;
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static void sn_init_pdas(char **);
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static void scan_for_ionodes(void);
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static nodepda_t *nodepdaindr[MAX_COMPACT_NODES];
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/*
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* The format of "screen_info" is strange, and due to early i386-setup
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* code. This is just enough to make the console code think we're on a
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* VGA color display.
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*/
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struct screen_info sn_screen_info = {
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.orig_x = 0,
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.orig_y = 0,
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.orig_video_mode = 3,
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.orig_video_cols = 80,
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.orig_video_ega_bx = 3,
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.orig_video_lines = 25,
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.orig_video_isVGA = 1,
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.orig_video_points = 16
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};
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/*
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* This is here so we can use the CMOS detection in ide-probe.c to
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* determine what drives are present. In theory, we don't need this
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* as the auto-detection could be done via ide-probe.c:do_probe() but
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* in practice that would be much slower, which is painful when
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* running in the simulator. Note that passing zeroes in DRIVE_INFO
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* is sufficient (the IDE driver will autodetect the drive geometry).
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*/
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#ifdef CONFIG_IA64_GENERIC
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extern char drive_info[4 * 16];
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#else
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char drive_info[4 * 16];
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#endif
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/*
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* Get nasid of current cpu early in boot before nodepda is initialized
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*/
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static int
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boot_get_nasid(void)
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{
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int nasid;
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if (ia64_sn_get_sapic_info(get_sapicid(), &nasid, NULL, NULL))
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BUG();
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return nasid;
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}
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/*
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* This routine can only be used during init, since
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* smp_boot_data is an init data structure.
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* We have to use smp_boot_data.cpu_phys_id to find
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* the physical id of the processor because the normal
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* cpu_physical_id() relies on data structures that
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* may not be initialized yet.
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*/
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static int __init pxm_to_nasid(int pxm)
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{
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int i;
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int nid;
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nid = pxm_to_nid_map[pxm];
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for (i = 0; i < num_node_memblks; i++) {
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if (node_memblk[i].nid == nid) {
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return NASID_GET(node_memblk[i].start_paddr);
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}
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}
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return -1;
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}
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/**
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* early_sn_setup - early setup routine for SN platforms
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*
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* Sets up an initial console to aid debugging. Intended primarily
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* for bringup. See start_kernel() in init/main.c.
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*/
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void __init early_sn_setup(void)
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{
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efi_system_table_t *efi_systab;
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efi_config_table_t *config_tables;
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struct ia64_sal_systab *sal_systab;
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struct ia64_sal_desc_entry_point *ep;
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char *p;
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int i, j;
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/*
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* Parse enough of the SAL tables to locate the SAL entry point. Since, console
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* IO on SN2 is done via SAL calls, early_printk won't work without this.
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*
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* This code duplicates some of the ACPI table parsing that is in efi.c & sal.c.
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* Any changes to those file may have to be made hereas well.
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*/
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efi_systab = (efi_system_table_t *) __va(ia64_boot_param->efi_systab);
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config_tables = __va(efi_systab->tables);
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for (i = 0; i < efi_systab->nr_tables; i++) {
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if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) ==
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0) {
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sal_systab = __va(config_tables[i].table);
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p = (char *)(sal_systab + 1);
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for (j = 0; j < sal_systab->entry_count; j++) {
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if (*p == SAL_DESC_ENTRY_POINT) {
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ep = (struct ia64_sal_desc_entry_point
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*)p;
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ia64_sal_handler_init(__va
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(ep->sal_proc),
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__va(ep->gp));
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return;
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}
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p += SAL_DESC_SIZE(*p);
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}
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}
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}
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/* Uh-oh, SAL not available?? */
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printk(KERN_ERR "failed to find SAL entry point\n");
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}
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extern int platform_intr_list[];
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extern nasid_t master_nasid;
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static int shub_1_1_found __initdata;
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/*
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* sn_check_for_wars
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*
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* Set flag for enabling shub specific wars
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*/
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static inline int __init is_shub_1_1(int nasid)
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{
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unsigned long id;
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int rev;
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if (is_shub2())
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return 0;
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id = REMOTE_HUB_L(nasid, SH1_SHUB_ID);
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rev = (id & SH1_SHUB_ID_REVISION_MASK) >> SH1_SHUB_ID_REVISION_SHFT;
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return rev <= 2;
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}
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static void __init sn_check_for_wars(void)
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{
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int cnode;
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if (is_shub2()) {
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/* none yet */
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} else {
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for_each_online_node(cnode) {
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if (is_shub_1_1(cnodeid_to_nasid(cnode)))
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sn_hub_info->shub_1_1_found = 1;
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}
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}
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}
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/**
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* sn_setup - SN platform setup routine
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* @cmdline_p: kernel command line
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*
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* Handles platform setup for SN machines. This includes determining
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* the RTC frequency (via a SAL call), initializing secondary CPUs, and
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* setting up per-node data areas. The console is also initialized here.
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*/
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void __init sn_setup(char **cmdline_p)
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{
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long status, ticks_per_sec, drift;
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int pxm;
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int major = sn_sal_rev_major(), minor = sn_sal_rev_minor();
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extern void sn_cpu_init(void);
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/*
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* If the generic code has enabled vga console support - lets
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* get rid of it again. This is a kludge for the fact that ACPI
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* currtently has no way of informing us if legacy VGA is available
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* or not.
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*/
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#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
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if (conswitchp == &vga_con) {
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printk(KERN_DEBUG "SGI: Disabling VGA console\n");
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#ifdef CONFIG_DUMMY_CONSOLE
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conswitchp = &dummy_con;
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#else
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conswitchp = NULL;
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#endif /* CONFIG_DUMMY_CONSOLE */
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}
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#endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */
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MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY;
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memset(physical_node_map, -1, sizeof(physical_node_map));
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for (pxm = 0; pxm < MAX_PXM_DOMAINS; pxm++)
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if (pxm_to_nid_map[pxm] != -1)
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physical_node_map[pxm_to_nasid(pxm)] =
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pxm_to_nid_map[pxm];
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/*
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* Old PROMs do not provide an ACPI FADT. Disable legacy keyboard
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* support here so we don't have to listen to failed keyboard probe
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* messages.
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*/
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if ((major < 2 || (major == 2 && minor <= 9)) &&
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acpi_kbd_controller_present) {
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printk(KERN_INFO "Disabling legacy keyboard support as prom "
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"is too old and doesn't provide FADT\n");
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acpi_kbd_controller_present = 0;
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}
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printk("SGI SAL version %x.%02x\n", major, minor);
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/*
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* Confirm the SAL we're running on is recent enough...
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*/
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if ((major < SN_SAL_MIN_MAJOR) || (major == SN_SAL_MIN_MAJOR &&
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minor < SN_SAL_MIN_MINOR)) {
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printk(KERN_ERR "This kernel needs SGI SAL version >= "
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"%x.%02x\n", SN_SAL_MIN_MAJOR, SN_SAL_MIN_MINOR);
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panic("PROM version too old\n");
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}
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master_nasid = boot_get_nasid();
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status =
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ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec,
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&drift);
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if (status != 0 || ticks_per_sec < 100000) {
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printk(KERN_WARNING
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"unable to determine platform RTC clock frequency, guessing.\n");
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/* PROM gives wrong value for clock freq. so guess */
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sn_rtc_cycles_per_second = 1000000000000UL / 30000UL;
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} else
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sn_rtc_cycles_per_second = ticks_per_sec;
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platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR;
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/*
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* we set the default root device to /dev/hda
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* to make simulation easy
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*/
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ROOT_DEV = Root_HDA1;
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/*
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* Create the PDAs and NODEPDAs for all the cpus.
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*/
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sn_init_pdas(cmdline_p);
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ia64_mark_idle = &snidle;
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/*
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* For the bootcpu, we do this here. All other cpus will make the
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* call as part of cpu_init in slave cpu initialization.
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*/
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sn_cpu_init();
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#ifdef CONFIG_SMP
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init_smp_config();
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#endif
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screen_info = sn_screen_info;
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sn_timer_init();
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/*
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* set pm_power_off to a SAL call to allow
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* sn machines to power off. The SAL call can be replaced
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* by an ACPI interface call when ACPI is fully implemented
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* for sn.
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*/
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pm_power_off = ia64_sn_power_down;
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}
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/**
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* sn_init_pdas - setup node data areas
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*
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* One time setup for Node Data Area. Called by sn_setup().
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*/
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static void __init sn_init_pdas(char **cmdline_p)
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{
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cnodeid_t cnode;
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memset(sn_cnodeid_to_nasid, -1,
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sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
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for_each_online_node(cnode)
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sn_cnodeid_to_nasid[cnode] =
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pxm_to_nasid(nid_to_pxm_map[cnode]);
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numionodes = num_online_nodes();
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scan_for_ionodes();
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/*
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* Allocate & initalize the nodepda for each node.
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*/
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for_each_online_node(cnode) {
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nodepdaindr[cnode] =
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alloc_bootmem_node(NODE_DATA(cnode), sizeof(nodepda_t));
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memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
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memset(nodepdaindr[cnode]->phys_cpuid, -1,
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sizeof(nodepdaindr[cnode]->phys_cpuid));
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}
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/*
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* Allocate & initialize nodepda for TIOs. For now, put them on node 0.
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*/
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for (cnode = num_online_nodes(); cnode < numionodes; cnode++) {
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nodepdaindr[cnode] =
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alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t));
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memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
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}
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/*
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* Now copy the array of nodepda pointers to each nodepda.
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*/
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for (cnode = 0; cnode < numionodes; cnode++)
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memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr,
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sizeof(nodepdaindr));
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/*
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* Set up IO related platform-dependent nodepda fields.
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* The following routine actually sets up the hubinfo struct
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* in nodepda.
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*/
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for_each_online_node(cnode) {
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bte_init_node(nodepdaindr[cnode], cnode);
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}
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/*
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* Initialize the per node hubdev. This includes IO Nodes and
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* headless/memless nodes.
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*/
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for (cnode = 0; cnode < numionodes; cnode++) {
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hubdev_init_node(nodepdaindr[cnode], cnode);
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}
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}
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/**
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* sn_cpu_init - initialize per-cpu data areas
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* @cpuid: cpuid of the caller
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*
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* Called during cpu initialization on each cpu as it starts.
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* Currently, initializes the per-cpu data area for SNIA.
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* Also sets up a few fields in the nodepda. Also known as
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* platform_cpu_init() by the ia64 machvec code.
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*/
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void __init sn_cpu_init(void)
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{
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int cpuid;
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int cpuphyid;
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int nasid;
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int subnode;
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int slice;
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int cnode;
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int i;
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static int wars_have_been_checked;
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memset(pda, 0, sizeof(pda));
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if (ia64_sn_get_sn_info(0, &sn_hub_info->shub2, &sn_hub_info->nasid_bitmask, &sn_hub_info->nasid_shift,
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&sn_system_size, &sn_sharing_domain_size, &sn_partition_id,
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&sn_coherency_id, &sn_region_size))
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BUG();
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sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2;
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/*
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* The boot cpu makes this call again after platform initialization is
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* complete.
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*/
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if (nodepdaindr[0] == NULL)
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return;
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cpuid = smp_processor_id();
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cpuphyid = get_sapicid();
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if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice))
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BUG();
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for (i=0; i < MAX_NUMNODES; i++) {
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if (nodepdaindr[i]) {
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nodepdaindr[i]->phys_cpuid[cpuid].nasid = nasid;
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nodepdaindr[i]->phys_cpuid[cpuid].slice = slice;
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nodepdaindr[i]->phys_cpuid[cpuid].subnode = subnode;
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}
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}
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cnode = nasid_to_cnodeid(nasid);
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pda->p_nodepda = nodepdaindr[cnode];
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pda->led_address =
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(typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT));
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pda->led_state = LED_ALWAYS_SET;
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pda->hb_count = HZ / 2;
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pda->hb_state = 0;
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pda->idle_flag = 0;
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if (cpuid != 0) {
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/* copy cpu 0's sn_cnodeid_to_nasid table to this cpu's */
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memcpy(sn_cnodeid_to_nasid,
|
|
(&per_cpu(__sn_cnodeid_to_nasid, 0)),
|
|
sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
|
|
}
|
|
|
|
/*
|
|
* Check for WARs.
|
|
* Only needs to be done once, on BSP.
|
|
* Has to be done after loop above, because it uses this cpu's
|
|
* sn_cnodeid_to_nasid table which was just initialized if this
|
|
* isn't cpu 0.
|
|
* Has to be done before assignment below.
|
|
*/
|
|
if (!wars_have_been_checked) {
|
|
sn_check_for_wars();
|
|
wars_have_been_checked = 1;
|
|
}
|
|
sn_hub_info->shub_1_1_found = shub_1_1_found;
|
|
|
|
/*
|
|
* Set up addresses of PIO/MEM write status registers.
|
|
*/
|
|
{
|
|
u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0};
|
|
u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_1,
|
|
SH2_PIO_WRITE_STATUS_2, SH2_PIO_WRITE_STATUS_3};
|
|
u64 *pio;
|
|
pio = is_shub1() ? pio1 : pio2;
|
|
pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]);
|
|
pda->pio_write_status_val = is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK : 0;
|
|
}
|
|
|
|
/*
|
|
* WAR addresses for SHUB 1.x.
|
|
*/
|
|
if (local_node_data->active_cpu_count++ == 0 && is_shub1()) {
|
|
int buddy_nasid;
|
|
buddy_nasid =
|
|
cnodeid_to_nasid(numa_node_id() ==
|
|
num_online_nodes() - 1 ? 0 : numa_node_id() + 1);
|
|
pda->pio_shub_war_cam_addr =
|
|
(volatile unsigned long *)GLOBAL_MMR_ADDR(nasid,
|
|
SH1_PI_CAM_CONTROL);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Scan klconfig for ionodes. Add the nasids to the
|
|
* physical_node_map and the pda and increment numionodes.
|
|
*/
|
|
|
|
static void __init scan_for_ionodes(void)
|
|
{
|
|
int nasid = 0;
|
|
lboard_t *brd;
|
|
|
|
/* Setup ionodes with memory */
|
|
for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
|
|
char *klgraph_header;
|
|
cnodeid_t cnodeid;
|
|
|
|
if (physical_node_map[nasid] == -1)
|
|
continue;
|
|
|
|
cnodeid = -1;
|
|
klgraph_header = __va(ia64_sn_get_klconfig_addr(nasid));
|
|
if (!klgraph_header) {
|
|
if (IS_RUNNING_ON_SIMULATOR())
|
|
continue;
|
|
BUG(); /* All nodes must have klconfig tables! */
|
|
}
|
|
cnodeid = nasid_to_cnodeid(nasid);
|
|
root_lboard[cnodeid] = (lboard_t *)
|
|
NODE_OFFSET_TO_LBOARD((nasid),
|
|
((kl_config_hdr_t
|
|
*) (klgraph_header))->
|
|
ch_board_info);
|
|
}
|
|
|
|
/* Scan headless/memless IO Nodes. */
|
|
for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
|
|
/* if there's no nasid, don't try to read the klconfig on the node */
|
|
if (physical_node_map[nasid] == -1)
|
|
continue;
|
|
brd = find_lboard_any((lboard_t *)
|
|
root_lboard[nasid_to_cnodeid(nasid)],
|
|
KLTYPE_SNIA);
|
|
if (brd) {
|
|
brd = KLCF_NEXT_ANY(brd); /* Skip this node's lboard */
|
|
if (!brd)
|
|
continue;
|
|
}
|
|
|
|
brd = find_lboard_any(brd, KLTYPE_SNIA);
|
|
|
|
while (brd) {
|
|
sn_cnodeid_to_nasid[numionodes] = brd->brd_nasid;
|
|
physical_node_map[brd->brd_nasid] = numionodes;
|
|
root_lboard[numionodes] = brd;
|
|
numionodes++;
|
|
brd = KLCF_NEXT_ANY(brd);
|
|
if (!brd)
|
|
break;
|
|
|
|
brd = find_lboard_any(brd, KLTYPE_SNIA);
|
|
}
|
|
}
|
|
|
|
/* Scan for TIO nodes. */
|
|
for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
|
|
/* if there's no nasid, don't try to read the klconfig on the node */
|
|
if (physical_node_map[nasid] == -1)
|
|
continue;
|
|
brd = find_lboard_any((lboard_t *)
|
|
root_lboard[nasid_to_cnodeid(nasid)],
|
|
KLTYPE_TIO);
|
|
while (brd) {
|
|
sn_cnodeid_to_nasid[numionodes] = brd->brd_nasid;
|
|
physical_node_map[brd->brd_nasid] = numionodes;
|
|
root_lboard[numionodes] = brd;
|
|
numionodes++;
|
|
brd = KLCF_NEXT_ANY(brd);
|
|
if (!brd)
|
|
break;
|
|
|
|
brd = find_lboard_any(brd, KLTYPE_TIO);
|
|
}
|
|
}
|
|
}
|
|
|
|
int
|
|
nasid_slice_to_cpuid(int nasid, int slice)
|
|
{
|
|
long cpu;
|
|
|
|
for (cpu=0; cpu < NR_CPUS; cpu++)
|
|
if (nodepda->phys_cpuid[cpu].nasid == nasid && nodepda->phys_cpuid[cpu].slice == slice)
|
|
return cpu;
|
|
|
|
return -1;
|
|
}
|