64 lines
2.1 KiB
Plaintext
64 lines
2.1 KiB
Plaintext
/*
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* Enhanced CPU type detection by Mike Jagdis, Patrick St. Jean
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* and Martin Mares, November 1997.
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*
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* Force Cyrix 6x86(MX) and M II processors to report MTRR capability
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* and Cyrix "coma bug" recognition by
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* Zoltán Böszörményi <zboszor@mail.externet.hu> February 1999.
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*
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* Force Centaur C6 processors to report MTRR capability.
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* Bart Hartgers <bart@etpmod.phys.tue.nl>, May 1999.
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*
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* Intel Mobile Pentium II detection fix. Sean Gilley, June 1999.
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*
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* IDT Winchip tweaks, misc clean ups.
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* Dave Jones <davej@suse.de>, August 1999
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*
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* Better detection of Centaur/IDT WinChip models.
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* Bart Hartgers <bart@etpmod.phys.tue.nl>, August 1999.
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*
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* Cleaned up cache-detection code
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* Dave Jones <davej@suse.de>, October 1999
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*
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* Added proper L2 cache detection for Coppermine
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* Dragan Stancevic <visitor@valinux.com>, October 1999
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*
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* Added the original array for capability flags but forgot to credit
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* myself :) (~1998) Fixed/cleaned up some cpu_model_info and other stuff
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* Jauder Ho <jauderho@carumba.com>, January 2000
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*
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* Detection for Celeron coppermine, identify_cpu() overhauled,
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* and a few other clean ups.
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* Dave Jones <davej@suse.de>, April 2000
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*
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* Pentium III FXSR, SSE support
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* General FPU state handling cleanups
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*
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* Added proper Cascades CPU and L2 cache detection for Cascades
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* and 8-way type cache happy bunch from Intel:^)
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* Dragan Stancevic <visitor@valinux.com>, May 2000
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*
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* Forward port AMD Duron errata T13 from 2.2.17pre
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* Dave Jones <davej@suse.de>, August 2000
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*
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* Forward port lots of fixes/improvements from 2.2.18pre
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* Cyrix III, Pentium IV support.
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* Dave Jones <davej@suse.de>, October 2000
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*
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* Massive cleanup of CPU detection and bug handling;
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* Transmeta CPU detection,
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* H. Peter Anvin <hpa@zytor.com>, November 2000
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*
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* VIA C3 Support.
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* Dave Jones <davej@suse.de>, March 2001
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*
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* AMD Athlon/Duron/Thunderbird bluesmoke support.
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* Dave Jones <davej@suse.de>, April 2001.
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*
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* CacheSize bug workaround updates for AMD, Intel & VIA Cyrix.
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* Dave Jones <davej@suse.de>, September, October 2001.
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*
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*/
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