255 lines
9.4 KiB
C
255 lines
9.4 KiB
C
/*
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* Copyright (C) ST-Ericsson SA 2010
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* Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com> for ST Ericsson.
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* License terms: GNU General Public License (GPL) version 2
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*/
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#ifndef __AB8500_SYSCTRL_H
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#define __AB8500_SYSCTRL_H
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#include <linux/bitops.h>
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#ifdef CONFIG_AB8500_CORE
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int ab8500_sysctrl_read(u16 reg, u8 *value);
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int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value);
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#else
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static inline int ab8500_sysctrl_read(u16 reg, u8 *value)
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{
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return 0;
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}
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static inline int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value)
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{
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return 0;
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}
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#endif /* CONFIG_AB8500_CORE */
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static inline int ab8500_sysctrl_set(u16 reg, u8 bits)
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{
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return ab8500_sysctrl_write(reg, bits, bits);
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}
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static inline int ab8500_sysctrl_clear(u16 reg, u8 bits)
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{
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return ab8500_sysctrl_write(reg, bits, 0);
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}
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/* Registers */
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#define AB8500_TURNONSTATUS 0x100
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#define AB8500_RESETSTATUS 0x101
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#define AB8500_PONKEY1PRESSSTATUS 0x102
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#define AB8500_SYSCLKREQSTATUS 0x142
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#define AB8500_STW4500CTRL1 0x180
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#define AB8500_STW4500CTRL2 0x181
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#define AB8500_STW4500CTRL3 0x200
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#define AB8500_MAINWDOGCTRL 0x201
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#define AB8500_MAINWDOGTIMER 0x202
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#define AB8500_LOWBAT 0x203
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#define AB8500_BATTOK 0x204
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#define AB8500_SYSCLKTIMER 0x205
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#define AB8500_SMPSCLKCTRL 0x206
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#define AB8500_SMPSCLKSEL1 0x207
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#define AB8500_SMPSCLKSEL2 0x208
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#define AB8500_SMPSCLKSEL3 0x209
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#define AB8500_SYSULPCLKCONF 0x20A
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#define AB8500_SYSULPCLKCTRL1 0x20B
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#define AB8500_SYSCLKCTRL 0x20C
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#define AB8500_SYSCLKREQ1VALID 0x20D
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#define AB8500_SYSTEMCTRLSUP 0x20F
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#define AB8500_SYSCLKREQ1RFCLKBUF 0x210
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#define AB8500_SYSCLKREQ2RFCLKBUF 0x211
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#define AB8500_SYSCLKREQ3RFCLKBUF 0x212
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#define AB8500_SYSCLKREQ4RFCLKBUF 0x213
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#define AB8500_SYSCLKREQ5RFCLKBUF 0x214
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#define AB8500_SYSCLKREQ6RFCLKBUF 0x215
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#define AB8500_SYSCLKREQ7RFCLKBUF 0x216
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#define AB8500_SYSCLKREQ8RFCLKBUF 0x217
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#define AB8500_DITHERCLKCTRL 0x220
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#define AB8500_SWATCTRL 0x230
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#define AB8500_HIQCLKCTRL 0x232
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#define AB8500_VSIMSYSCLKCTRL 0x233
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/* Bits */
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#define AB8500_TURNONSTATUS_PORNVBAT BIT(0)
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#define AB8500_TURNONSTATUS_PONKEY1DBF BIT(1)
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#define AB8500_TURNONSTATUS_PONKEY2DBF BIT(2)
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#define AB8500_TURNONSTATUS_RTCALARM BIT(3)
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#define AB8500_TURNONSTATUS_MAINCHDET BIT(4)
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#define AB8500_TURNONSTATUS_VBUSDET BIT(5)
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#define AB8500_TURNONSTATUS_USBIDDETECT BIT(6)
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#define AB8500_RESETSTATUS_RESETN4500NSTATUS BIT(0)
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#define AB8500_RESETSTATUS_SWRESETN4500NSTATUS BIT(2)
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#define AB8500_PONKEY1PRESSSTATUS_PONKEY1PRESSTIME_MASK 0x7F
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#define AB8500_PONKEY1PRESSSTATUS_PONKEY1PRESSTIME_SHIFT 0
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#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ1STATUS BIT(0)
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#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ2STATUS BIT(1)
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#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ3STATUS BIT(2)
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#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ4STATUS BIT(3)
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#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ5STATUS BIT(4)
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#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ6STATUS BIT(5)
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#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ7STATUS BIT(6)
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#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ8STATUS BIT(7)
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#define AB8500_STW4500CTRL1_SWOFF BIT(0)
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#define AB8500_STW4500CTRL1_SWRESET4500N BIT(1)
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#define AB8500_STW4500CTRL1_THDB8500SWOFF BIT(2)
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#define AB8500_STW4500CTRL2_RESETNVAUX1VALID BIT(0)
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#define AB8500_STW4500CTRL2_RESETNVAUX2VALID BIT(1)
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#define AB8500_STW4500CTRL2_RESETNVAUX3VALID BIT(2)
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#define AB8500_STW4500CTRL2_RESETNVMODVALID BIT(3)
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#define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY1VALID BIT(4)
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#define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY2VALID BIT(5)
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#define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY3VALID BIT(6)
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#define AB8500_STW4500CTRL2_RESETNVSMPS1VALID BIT(7)
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#define AB8500_STW4500CTRL3_CLK32KOUT2DIS BIT(0)
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#define AB8500_STW4500CTRL3_RESETAUDN BIT(1)
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#define AB8500_STW4500CTRL3_RESETDENCN BIT(2)
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#define AB8500_STW4500CTRL3_THSDENA BIT(3)
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#define AB8500_MAINWDOGCTRL_MAINWDOGENA BIT(0)
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#define AB8500_MAINWDOGCTRL_MAINWDOGKICK BIT(1)
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#define AB8500_MAINWDOGCTRL_WDEXPTURNONVALID BIT(4)
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#define AB8500_MAINWDOGTIMER_MAINWDOGTIMER_MASK 0x7F
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#define AB8500_MAINWDOGTIMER_MAINWDOGTIMER_SHIFT 0
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#define AB8500_LOWBAT_LOWBATENA BIT(0)
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#define AB8500_LOWBAT_LOWBAT_MASK 0x7E
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#define AB8500_LOWBAT_LOWBAT_SHIFT 1
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#define AB8500_BATTOK_BATTOKSEL0THF_MASK 0x0F
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#define AB8500_BATTOK_BATTOKSEL0THF_SHIFT 0
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#define AB8500_BATTOK_BATTOKSEL1THF_MASK 0xF0
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#define AB8500_BATTOK_BATTOKSEL1THF_SHIFT 4
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#define AB8500_SYSCLKTIMER_SYSCLKTIMER_MASK 0x0F
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#define AB8500_SYSCLKTIMER_SYSCLKTIMER_SHIFT 0
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#define AB8500_SYSCLKTIMER_SYSCLKTIMERADJ_MASK 0xF0
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#define AB8500_SYSCLKTIMER_SYSCLKTIMERADJ_SHIFT 4
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#define AB8500_SMPSCLKCTRL_SMPSCLKINTSEL_MASK 0x03
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#define AB8500_SMPSCLKCTRL_SMPSCLKINTSEL_SHIFT 0
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#define AB8500_SMPSCLKCTRL_3M2CLKINTENA BIT(2)
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#define AB8500_SMPSCLKSEL1_VARMCLKSEL_MASK 0x07
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#define AB8500_SMPSCLKSEL1_VARMCLKSEL_SHIFT 0
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#define AB8500_SMPSCLKSEL1_VAPECLKSEL_MASK 0x38
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#define AB8500_SMPSCLKSEL1_VAPECLKSEL_SHIFT 3
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#define AB8500_SMPSCLKSEL2_VMODCLKSEL_MASK 0x07
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#define AB8500_SMPSCLKSEL2_VMODCLKSEL_SHIFT 0
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#define AB8500_SMPSCLKSEL2_VSMPS1CLKSEL_MASK 0x38
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#define AB8500_SMPSCLKSEL2_VSMPS1CLKSEL_SHIFT 3
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#define AB8500_SMPSCLKSEL3_VSMPS2CLKSEL_MASK 0x07
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#define AB8500_SMPSCLKSEL3_VSMPS2CLKSEL_SHIFT 0
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#define AB8500_SMPSCLKSEL3_VSMPS3CLKSEL_MASK 0x38
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#define AB8500_SMPSCLKSEL3_VSMPS3CLKSEL_SHIFT 3
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#define AB8500_SYSULPCLKCONF_ULPCLKCONF_MASK 0x03
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#define AB8500_SYSULPCLKCONF_ULPCLKCONF_SHIFT 0
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#define AB8500_SYSULPCLKCONF_CLK27MHZSTRE BIT(2)
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#define AB8500_SYSULPCLKCONF_TVOUTCLKDELN BIT(3)
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#define AB8500_SYSULPCLKCONF_TVOUTCLKINV BIT(4)
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#define AB8500_SYSULPCLKCONF_ULPCLKSTRE BIT(5)
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#define AB8500_SYSULPCLKCONF_CLK27MHZBUFENA BIT(6)
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#define AB8500_SYSULPCLKCONF_CLK27MHZPDENA BIT(7)
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#define AB8500_SYSULPCLKCTRL1_SYSULPCLKINTSEL_MASK 0x03
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#define AB8500_SYSULPCLKCTRL1_SYSULPCLKINTSEL_SHIFT 0
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#define AB8500_SYSULPCLKCTRL1_ULPCLKREQ BIT(2)
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#define AB8500_SYSULPCLKCTRL1_4500SYSCLKREQ BIT(3)
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#define AB8500_SYSULPCLKCTRL1_AUDIOCLKENA BIT(4)
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#define AB8500_SYSULPCLKCTRL1_SYSCLKBUF2REQ BIT(5)
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#define AB8500_SYSULPCLKCTRL1_SYSCLKBUF3REQ BIT(6)
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#define AB8500_SYSULPCLKCTRL1_SYSCLKBUF4REQ BIT(7)
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#define AB8500_SYSCLKCTRL_TVOUTPLLENA BIT(0)
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#define AB8500_SYSCLKCTRL_TVOUTCLKENA BIT(1)
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#define AB8500_SYSCLKCTRL_USBCLKENA BIT(2)
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#define AB8500_SYSCLKREQ1VALID_SYSCLKREQ1VALID BIT(0)
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#define AB8500_SYSCLKREQ1VALID_ULPCLKREQ1VALID BIT(1)
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#define AB8500_SYSCLKREQ1VALID_USBSYSCLKREQ1VALID BIT(2)
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#define AB8500_SYSTEMCTRLSUP_EXTSUP12LPNCLKSEL_MASK 0x03
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#define AB8500_SYSTEMCTRLSUP_EXTSUP12LPNCLKSEL_SHIFT 0
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#define AB8500_SYSTEMCTRLSUP_EXTSUP3LPNCLKSEL_MASK 0x0C
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#define AB8500_SYSTEMCTRLSUP_EXTSUP3LPNCLKSEL_SHIFT 2
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#define AB8500_SYSTEMCTRLSUP_INTDB8500NOD BIT(4)
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#define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF2 BIT(2)
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#define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF3 BIT(3)
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#define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF4 BIT(4)
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#define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF2 BIT(2)
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#define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF3 BIT(3)
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#define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF4 BIT(4)
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#define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF2 BIT(2)
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#define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF3 BIT(3)
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#define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF4 BIT(4)
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#define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF2 BIT(2)
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#define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF3 BIT(3)
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#define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF4 BIT(4)
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#define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF2 BIT(2)
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#define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF3 BIT(3)
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#define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF4 BIT(4)
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#define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF2 BIT(2)
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#define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF3 BIT(3)
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#define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF4 BIT(4)
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#define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF2 BIT(2)
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#define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF3 BIT(3)
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#define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF4 BIT(4)
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#define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF2 BIT(2)
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#define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF3 BIT(3)
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#define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF4 BIT(4)
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#define AB8500_DITHERCLKCTRL_VARMDITHERENA BIT(0)
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#define AB8500_DITHERCLKCTRL_VSMPS3DITHERENA BIT(1)
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#define AB8500_DITHERCLKCTRL_VSMPS1DITHERENA BIT(2)
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#define AB8500_DITHERCLKCTRL_VSMPS2DITHERENA BIT(3)
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#define AB8500_DITHERCLKCTRL_VMODDITHERENA BIT(4)
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#define AB8500_DITHERCLKCTRL_VAPEDITHERENA BIT(5)
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#define AB8500_DITHERCLKCTRL_DITHERDEL_MASK 0xC0
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#define AB8500_DITHERCLKCTRL_DITHERDEL_SHIFT 6
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#define AB8500_SWATCTRL_UPDATERF BIT(0)
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#define AB8500_SWATCTRL_SWATENABLE BIT(1)
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#define AB8500_SWATCTRL_RFOFFTIMER_MASK 0x1C
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#define AB8500_SWATCTRL_RFOFFTIMER_SHIFT 2
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#define AB8500_SWATCTRL_SWATBIT5 BIT(6)
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#define AB8500_HIQCLKCTRL_SYSCLKREQ1HIQENAVALID BIT(0)
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#define AB8500_HIQCLKCTRL_SYSCLKREQ2HIQENAVALID BIT(1)
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#define AB8500_HIQCLKCTRL_SYSCLKREQ3HIQENAVALID BIT(2)
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#define AB8500_HIQCLKCTRL_SYSCLKREQ4HIQENAVALID BIT(3)
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#define AB8500_HIQCLKCTRL_SYSCLKREQ5HIQENAVALID BIT(4)
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#define AB8500_HIQCLKCTRL_SYSCLKREQ6HIQENAVALID BIT(5)
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#define AB8500_HIQCLKCTRL_SYSCLKREQ7HIQENAVALID BIT(6)
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#define AB8500_HIQCLKCTRL_SYSCLKREQ8HIQENAVALID BIT(7)
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#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ1VALID BIT(0)
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#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ2VALID BIT(1)
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#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ3VALID BIT(2)
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#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ4VALID BIT(3)
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#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ5VALID BIT(4)
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#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ6VALID BIT(5)
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#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ7VALID BIT(6)
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#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ8VALID BIT(7)
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#endif /* __AB8500_SYSCTRL_H */
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