164 lines
4.4 KiB
C
164 lines
4.4 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2009-2012 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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****************************************************************************
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*/
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#ifndef __RTL8723E_DEF_H__
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#define __RTL8723E_DEF_H__
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#define HAL_PRIME_CHNL_OFFSET_LOWER 1
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#define RX_MPDU_QUEUE 0
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#define CHIP_8723 BIT(0)
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#define NORMAL_CHIP BIT(3)
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#define RF_TYPE_1T2R BIT(4)
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#define RF_TYPE_2T2R BIT(5)
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#define CHIP_VENDOR_UMC BIT(7)
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#define B_CUT_VERSION BIT(12)
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#define C_CUT_VERSION BIT(13)
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#define D_CUT_VERSION ((BIT(12)|BIT(13)))
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#define E_CUT_VERSION BIT(14)
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#define RF_RL_ID (BIT(31)|BIT(30)|BIT(29)|BIT(28))
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enum version_8723e {
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VERSION_TEST_UMC_CHIP_8723 = 0x0081,
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VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT = 0x0089,
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VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT = 0x1089,
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};
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/* MASK */
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#define IC_TYPE_MASK (BIT(0)|BIT(1)|BIT(2))
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#define CHIP_TYPE_MASK BIT(3)
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#define RF_TYPE_MASK (BIT(4)|BIT(5)|BIT(6))
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#define MANUFACTUER_MASK BIT(7)
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#define ROM_VERSION_MASK (BIT(11)|BIT(10)|BIT(9)|BIT(8))
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#define CUT_VERSION_MASK (BIT(15)|BIT(14)|BIT(13)|BIT(12))
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/* Get element */
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#define GET_CVID_IC_TYPE(version) ((version) & IC_TYPE_MASK)
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#define GET_CVID_MANUFACTUER(version) ((version) & MANUFACTUER_MASK)
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#define GET_CVID_CUT_VERSION(version) ((version) & CUT_VERSION_MASK)
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#define IS_81XXC(version) ((GET_CVID_IC_TYPE(version) == 0) ?\
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true : false)
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#define IS_8723_SERIES(version) \
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((GET_CVID_IC_TYPE(version) == CHIP_8723) ? true : false)
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#define IS_CHIP_VENDOR_UMC(version) \
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((GET_CVID_MANUFACTUER(version)) ? true : false)
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#define IS_VENDOR_UMC_A_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? \
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((GET_CVID_CUT_VERSION(version)) ? false : true) : false)
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#define IS_VENDOR_8723_A_CUT(version) ((IS_8723_SERIES(version)) ? \
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((GET_CVID_CUT_VERSION(version)) ? false : true) : false)
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#define IS_81xxC_VENDOR_UMC_B_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) \
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? ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? \
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true : false) : false)
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enum rf_optype {
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RF_OP_BY_SW_3WIRE = 0,
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RF_OP_BY_FW,
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RF_OP_MAX
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};
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enum rf_power_state {
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RF_ON,
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RF_OFF,
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RF_SLEEP,
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RF_SHUT_DOWN,
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};
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enum power_save_mode {
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POWER_SAVE_MODE_ACTIVE,
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POWER_SAVE_MODE_SAVE,
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};
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enum power_polocy_config {
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POWERCFG_MAX_POWER_SAVINGS,
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POWERCFG_GLOBAL_POWER_SAVINGS,
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POWERCFG_LOCAL_POWER_SAVINGS,
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POWERCFG_LENOVO,
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};
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enum interface_select_pci {
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INTF_SEL1_MINICARD = 0,
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INTF_SEL0_PCIE = 1,
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INTF_SEL2_RSV = 2,
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INTF_SEL3_RSV = 3,
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};
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enum hal_fw_c2h_cmd_id {
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HAL_FW_C2H_CMD_Read_MACREG = 0,
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HAL_FW_C2H_CMD_Read_BBREG = 1,
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HAL_FW_C2H_CMD_Read_RFREG = 2,
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HAL_FW_C2H_CMD_Read_EEPROM = 3,
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HAL_FW_C2H_CMD_Read_EFUSE = 4,
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HAL_FW_C2H_CMD_Read_CAM = 5,
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HAL_FW_C2H_CMD_Get_BasicRate = 6,
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HAL_FW_C2H_CMD_Get_DataRate = 7,
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HAL_FW_C2H_CMD_Survey = 8,
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HAL_FW_C2H_CMD_SurveyDone = 9,
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HAL_FW_C2H_CMD_JoinBss = 10,
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HAL_FW_C2H_CMD_AddSTA = 11,
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HAL_FW_C2H_CMD_DelSTA = 12,
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HAL_FW_C2H_CMD_AtimDone = 13,
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HAL_FW_C2H_CMD_TX_Report = 14,
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HAL_FW_C2H_CMD_CCX_Report = 15,
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HAL_FW_C2H_CMD_DTM_Report = 16,
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HAL_FW_C2H_CMD_TX_Rate_Statistics = 17,
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HAL_FW_C2H_CMD_C2HLBK = 18,
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HAL_FW_C2H_CMD_C2HDBG = 19,
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HAL_FW_C2H_CMD_C2HFEEDBACK = 20,
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HAL_FW_C2H_CMD_MAX
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};
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enum rtl_desc_qsel {
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QSLT_BK = 0x2,
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QSLT_BE = 0x0,
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QSLT_VI = 0x5,
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QSLT_VO = 0x7,
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QSLT_BEACON = 0x10,
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QSLT_HIGH = 0x11,
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QSLT_MGNT = 0x12,
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QSLT_CMD = 0x13,
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};
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struct phy_sts_cck_8723e_t {
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u8 adc_pwdb_X[4];
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u8 sq_rpt;
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u8 cck_agc_rpt;
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};
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struct h2c_cmd_8723e {
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u8 element_id;
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u32 cmd_len;
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u8 *p_cmdbuffer;
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};
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#endif
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