310 lines
8.8 KiB
C
310 lines
8.8 KiB
C
/*
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* linux/arch/arm/plat-omap/timer32k.c
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*
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* OMAP 32K Timer
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*
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* Copyright (C) 2004 - 2005 Nokia Corporation
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* Partial timer rewrite and additional dynamic tick timer support by
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* Tony Lindgen <tony@atomide.com> and
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* Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
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* OMAP Dual-mode timer framework support by Timo Teras
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*
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* MPU timer code based on the older MPU timer code for OMAP
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* Copyright (C) 2000 RidgeRun, Inc.
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* Author: Greg Lonnon <glonnon@ridgerun.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <asm/system.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/leds.h>
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/time.h>
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struct sys_timer omap_timer;
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/*
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* ---------------------------------------------------------------------------
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* 32KHz OS timer
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*
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* This currently works only on 16xx, as 1510 does not have the continuous
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* 32KHz synchronous timer. The 32KHz synchronous timer is used to keep track
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* of time in addition to the 32KHz OS timer. Using only the 32KHz OS timer
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* on 1510 would be possible, but the timer would not be as accurate as
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* with the 32KHz synchronized timer.
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* ---------------------------------------------------------------------------
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*/
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#if defined(CONFIG_ARCH_OMAP16XX)
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#define TIMER_32K_SYNCHRONIZED 0xfffbc410
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#elif defined(CONFIG_ARCH_OMAP24XX)
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#define TIMER_32K_SYNCHRONIZED 0x48004010
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#else
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#error OMAP 32KHz timer does not currently work on 15XX!
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#endif
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/* 16xx specific defines */
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#define OMAP1_32K_TIMER_BASE 0xfffb9000
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#define OMAP1_32K_TIMER_CR 0x08
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#define OMAP1_32K_TIMER_TVR 0x00
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#define OMAP1_32K_TIMER_TCR 0x04
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#define OMAP_32K_TICKS_PER_HZ (32768 / HZ)
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/*
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* TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1
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* so with HZ = 128, TVR = 255.
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*/
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#define OMAP_32K_TIMER_TICK_PERIOD ((32768 / HZ) - 1)
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#define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate) \
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(((nr_jiffies) * (clock_rate)) / HZ)
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#if defined(CONFIG_ARCH_OMAP1)
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static inline void omap_32k_timer_write(int val, int reg)
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{
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omap_writew(val, OMAP1_32K_TIMER_BASE + reg);
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}
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static inline unsigned long omap_32k_timer_read(int reg)
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{
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return omap_readl(OMAP1_32K_TIMER_BASE + reg) & 0xffffff;
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}
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static inline void omap_32k_timer_start(unsigned long load_val)
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{
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omap_32k_timer_write(load_val, OMAP1_32K_TIMER_TVR);
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omap_32k_timer_write(0x0f, OMAP1_32K_TIMER_CR);
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}
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static inline void omap_32k_timer_stop(void)
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{
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omap_32k_timer_write(0x0, OMAP1_32K_TIMER_CR);
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}
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#define omap_32k_timer_ack_irq()
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#elif defined(CONFIG_ARCH_OMAP2)
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#include <asm/arch/dmtimer.h>
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static struct omap_dm_timer *gptimer;
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static inline void omap_32k_timer_start(unsigned long load_val)
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{
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omap_dm_timer_set_load(gptimer, 1, 0xffffffff - load_val);
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omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
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omap_dm_timer_start(gptimer);
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}
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static inline void omap_32k_timer_stop(void)
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{
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omap_dm_timer_stop(gptimer);
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}
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static inline void omap_32k_timer_ack_irq(void)
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{
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u32 status = omap_dm_timer_read_status(gptimer);
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omap_dm_timer_write_status(gptimer, status);
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}
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#endif
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/*
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* The 32KHz synchronized timer is an additional timer on 16xx.
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* It is always running.
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*/
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static inline unsigned long omap_32k_sync_timer_read(void)
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{
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return omap_readl(TIMER_32K_SYNCHRONIZED);
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}
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/*
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* Rounds down to nearest usec. Note that this will overflow for larger values.
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*/
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static inline unsigned long omap_32k_ticks_to_usecs(unsigned long ticks_32k)
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{
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return (ticks_32k * 5*5*5*5*5*5) >> 9;
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}
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/*
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* Rounds down to nearest nsec.
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*/
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static inline unsigned long long
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omap_32k_ticks_to_nsecs(unsigned long ticks_32k)
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{
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return (unsigned long long) ticks_32k * 1000 * 5*5*5*5*5*5 >> 9;
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}
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static unsigned long omap_32k_last_tick = 0;
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/*
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* Returns elapsed usecs since last 32k timer interrupt
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*/
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static unsigned long omap_32k_timer_gettimeoffset(void)
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{
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unsigned long now = omap_32k_sync_timer_read();
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return omap_32k_ticks_to_usecs(now - omap_32k_last_tick);
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}
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/*
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* Returns current time from boot in nsecs. It's OK for this to wrap
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* around for now, as it's just a relative time stamp.
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*/
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unsigned long long sched_clock(void)
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{
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return omap_32k_ticks_to_nsecs(omap_32k_sync_timer_read());
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}
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/*
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* Timer interrupt for 32KHz timer. When dynamic tick is enabled, this
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* function is also called from other interrupts to remove latency
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* issues with dynamic tick. In the dynamic tick case, we need to lock
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* with irqsave.
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*/
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static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id,
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struct pt_regs *regs)
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{
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unsigned long flags;
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unsigned long now;
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write_seqlock_irqsave(&xtime_lock, flags);
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omap_32k_timer_ack_irq();
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now = omap_32k_sync_timer_read();
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while ((signed long)(now - omap_32k_last_tick)
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>= OMAP_32K_TICKS_PER_HZ) {
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omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ;
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timer_tick(regs);
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}
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/* Restart timer so we don't drift off due to modulo or dynamic tick.
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* By default we program the next timer to be continuous to avoid
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* latencies during high system load. During dynamic tick operation the
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* continuous timer can be overridden from pm_idle to be longer.
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*/
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omap_32k_timer_start(omap_32k_last_tick + OMAP_32K_TICKS_PER_HZ - now);
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write_sequnlock_irqrestore(&xtime_lock, flags);
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return IRQ_HANDLED;
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}
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#ifdef CONFIG_NO_IDLE_HZ
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/*
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* Programs the next timer interrupt needed. Called when dynamic tick is
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* enabled, and to reprogram the ticks to skip from pm_idle. Note that
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* we can keep the timer continuous, and don't need to set it to run in
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* one-shot mode. This is because the timer will get reprogrammed again
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* after next interrupt.
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*/
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void omap_32k_timer_reprogram(unsigned long next_tick)
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{
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omap_32k_timer_start(JIFFIES_TO_HW_TICKS(next_tick, 32768) + 1);
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}
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static struct irqaction omap_32k_timer_irq;
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extern struct timer_update_handler timer_update;
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static int omap_32k_timer_enable_dyn_tick(void)
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{
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/* No need to reprogram timer, just use the next interrupt */
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return 0;
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}
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static int omap_32k_timer_disable_dyn_tick(void)
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{
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omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
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return 0;
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}
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static struct dyn_tick_timer omap_dyn_tick_timer = {
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.enable = omap_32k_timer_enable_dyn_tick,
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.disable = omap_32k_timer_disable_dyn_tick,
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.reprogram = omap_32k_timer_reprogram,
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.handler = omap_32k_timer_interrupt,
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};
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#endif /* CONFIG_NO_IDLE_HZ */
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static struct irqaction omap_32k_timer_irq = {
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.name = "32KHz timer",
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.flags = SA_INTERRUPT | SA_TIMER,
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.handler = omap_32k_timer_interrupt,
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};
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static __init void omap_init_32k_timer(void)
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{
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#ifdef CONFIG_NO_IDLE_HZ
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omap_timer.dyn_tick = &omap_dyn_tick_timer;
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#endif
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if (cpu_class_is_omap1())
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setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
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omap_timer.offset = omap_32k_timer_gettimeoffset;
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omap_32k_last_tick = omap_32k_sync_timer_read();
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/* REVISIT: Check 24xx TIOCP_CFG settings after idle works */
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if (cpu_is_omap24xx()) {
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gptimer = omap_dm_timer_request_specific(1);
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BUG_ON(gptimer == NULL);
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omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_32_KHZ);
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setup_irq(omap_dm_timer_get_irq(gptimer), &omap_32k_timer_irq);
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omap_dm_timer_set_int_enable(gptimer,
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OMAP_TIMER_INT_CAPTURE | OMAP_TIMER_INT_OVERFLOW |
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OMAP_TIMER_INT_MATCH);
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}
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omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
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}
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/*
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* ---------------------------------------------------------------------------
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* Timer initialization
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* ---------------------------------------------------------------------------
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*/
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static void __init omap_timer_init(void)
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{
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#ifdef CONFIG_OMAP_DM_TIMER
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omap_dm_timer_init();
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#endif
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omap_init_32k_timer();
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}
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struct sys_timer omap_timer = {
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.init = omap_timer_init,
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.offset = NULL, /* Initialized later */
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};
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