155 lines
8.2 KiB
C
155 lines
8.2 KiB
C
/* SPDX-License-Identifier: LGPL-2.1 OR MIT */
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/*
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* AARCH64 specific definitions for NOLIBC
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* Copyright (C) 2017-2022 Willy Tarreau <w@1wt.eu>
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*/
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#ifndef _NOLIBC_ARCH_AARCH64_H
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#define _NOLIBC_ARCH_AARCH64_H
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#include "compiler.h"
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#include "crt.h"
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/* Syscalls for AARCH64 :
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* - registers are 64-bit
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* - stack is 16-byte aligned
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* - syscall number is passed in x8
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* - arguments are in x0, x1, x2, x3, x4, x5
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* - the system call is performed by calling svc 0
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* - syscall return comes in x0.
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* - the arguments are cast to long and assigned into the target registers
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* which are then simply passed as registers to the asm code, so that we
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* don't have to experience issues with register constraints.
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*/
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#define my_syscall0(num) \
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({ \
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register long _num __asm__ ("x8") = (num); \
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register long _arg1 __asm__ ("x0"); \
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\
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__asm__ volatile ( \
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"svc #0\n" \
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: "=r"(_arg1) \
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: "r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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#define my_syscall1(num, arg1) \
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({ \
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register long _num __asm__ ("x8") = (num); \
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register long _arg1 __asm__ ("x0") = (long)(arg1); \
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\
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__asm__ volatile ( \
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"svc #0\n" \
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: "=r"(_arg1) \
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: "r"(_arg1), \
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"r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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#define my_syscall2(num, arg1, arg2) \
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({ \
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register long _num __asm__ ("x8") = (num); \
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register long _arg1 __asm__ ("x0") = (long)(arg1); \
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register long _arg2 __asm__ ("x1") = (long)(arg2); \
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\
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__asm__ volatile ( \
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"svc #0\n" \
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: "=r"(_arg1) \
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: "r"(_arg1), "r"(_arg2), \
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"r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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#define my_syscall3(num, arg1, arg2, arg3) \
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({ \
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register long _num __asm__ ("x8") = (num); \
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register long _arg1 __asm__ ("x0") = (long)(arg1); \
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register long _arg2 __asm__ ("x1") = (long)(arg2); \
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register long _arg3 __asm__ ("x2") = (long)(arg3); \
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\
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__asm__ volatile ( \
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"svc #0\n" \
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: "=r"(_arg1) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), \
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"r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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#define my_syscall4(num, arg1, arg2, arg3, arg4) \
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({ \
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register long _num __asm__ ("x8") = (num); \
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register long _arg1 __asm__ ("x0") = (long)(arg1); \
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register long _arg2 __asm__ ("x1") = (long)(arg2); \
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register long _arg3 __asm__ ("x2") = (long)(arg3); \
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register long _arg4 __asm__ ("x3") = (long)(arg4); \
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\
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__asm__ volatile ( \
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"svc #0\n" \
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: "=r"(_arg1) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
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"r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
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({ \
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register long _num __asm__ ("x8") = (num); \
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register long _arg1 __asm__ ("x0") = (long)(arg1); \
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register long _arg2 __asm__ ("x1") = (long)(arg2); \
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register long _arg3 __asm__ ("x2") = (long)(arg3); \
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register long _arg4 __asm__ ("x3") = (long)(arg4); \
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register long _arg5 __asm__ ("x4") = (long)(arg5); \
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\
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__asm__ volatile ( \
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"svc #0\n" \
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: "=r" (_arg1) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
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"r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
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({ \
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register long _num __asm__ ("x8") = (num); \
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register long _arg1 __asm__ ("x0") = (long)(arg1); \
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register long _arg2 __asm__ ("x1") = (long)(arg2); \
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register long _arg3 __asm__ ("x2") = (long)(arg3); \
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register long _arg4 __asm__ ("x3") = (long)(arg4); \
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register long _arg5 __asm__ ("x4") = (long)(arg5); \
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register long _arg6 __asm__ ("x5") = (long)(arg6); \
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\
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__asm__ volatile ( \
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"svc #0\n" \
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: "=r" (_arg1) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
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"r"(_arg6), "r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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/* startup code */
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void __attribute__((weak, noreturn, optimize("Os", "omit-frame-pointer"))) __no_stack_protector _start(void)
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{
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__asm__ volatile (
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"mov x0, sp\n" /* save stack pointer to x0, as arg1 of _start_c */
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"and sp, x0, -16\n" /* sp must be 16-byte aligned in the callee */
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"bl _start_c\n" /* transfer to c runtime */
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);
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__builtin_unreachable();
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}
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#endif /* _NOLIBC_ARCH_AARCH64_H */
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