252 lines
6.7 KiB
C
252 lines
6.7 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright IBM Corp. 2007
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*/
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/highmem.h>
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#include <asm/mmu-44x.h>
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#include <asm/kvm_ppc.h>
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#include "44x_tlb.h"
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#define PPC44x_TLB_USER_PERM_MASK (PPC44x_TLB_UX|PPC44x_TLB_UR|PPC44x_TLB_UW)
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#define PPC44x_TLB_SUPER_PERM_MASK (PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW)
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static unsigned int kvmppc_tlb_44x_pos;
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static u32 kvmppc_44x_tlb_shadow_attrib(u32 attrib, int usermode)
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{
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/* Mask off reserved bits. */
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attrib &= PPC44x_TLB_PERM_MASK|PPC44x_TLB_ATTR_MASK;
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if (!usermode) {
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/* Guest is in supervisor mode, so we need to translate guest
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* supervisor permissions into user permissions. */
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attrib &= ~PPC44x_TLB_USER_PERM_MASK;
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attrib |= (attrib & PPC44x_TLB_SUPER_PERM_MASK) << 3;
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}
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/* Make sure host can always access this memory. */
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attrib |= PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW;
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return attrib;
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}
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/* Search the guest TLB for a matching entry. */
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int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, unsigned int pid,
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unsigned int as)
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{
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int i;
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/* XXX Replace loop with fancy data structures. */
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for (i = 0; i < PPC44x_TLB_SIZE; i++) {
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struct tlbe *tlbe = &vcpu->arch.guest_tlb[i];
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unsigned int tid;
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if (eaddr < get_tlb_eaddr(tlbe))
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continue;
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if (eaddr > get_tlb_end(tlbe))
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continue;
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tid = get_tlb_tid(tlbe);
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if (tid && (tid != pid))
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continue;
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if (!get_tlb_v(tlbe))
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continue;
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if (get_tlb_ts(tlbe) != as)
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continue;
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return i;
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}
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return -1;
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}
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struct tlbe *kvmppc_44x_itlb_search(struct kvm_vcpu *vcpu, gva_t eaddr)
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{
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unsigned int as = !!(vcpu->arch.msr & MSR_IS);
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unsigned int index;
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index = kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
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if (index == -1)
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return NULL;
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return &vcpu->arch.guest_tlb[index];
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}
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struct tlbe *kvmppc_44x_dtlb_search(struct kvm_vcpu *vcpu, gva_t eaddr)
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{
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unsigned int as = !!(vcpu->arch.msr & MSR_DS);
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unsigned int index;
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index = kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
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if (index == -1)
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return NULL;
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return &vcpu->arch.guest_tlb[index];
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}
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static int kvmppc_44x_tlbe_is_writable(struct tlbe *tlbe)
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{
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return tlbe->word2 & (PPC44x_TLB_SW|PPC44x_TLB_UW);
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}
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static void kvmppc_44x_shadow_release(struct kvm_vcpu *vcpu,
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unsigned int index)
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{
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struct tlbe *stlbe = &vcpu->arch.shadow_tlb[index];
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struct page *page = vcpu->arch.shadow_pages[index];
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if (get_tlb_v(stlbe)) {
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if (kvmppc_44x_tlbe_is_writable(stlbe))
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kvm_release_page_dirty(page);
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else
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kvm_release_page_clean(page);
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}
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}
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void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu)
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{
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int i;
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for (i = 0; i <= tlb_44x_hwater; i++)
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kvmppc_44x_shadow_release(vcpu, i);
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}
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void kvmppc_tlbe_set_modified(struct kvm_vcpu *vcpu, unsigned int i)
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{
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vcpu->arch.shadow_tlb_mod[i] = 1;
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}
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/* Caller must ensure that the specified guest TLB entry is safe to insert into
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* the shadow TLB. */
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void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid,
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u32 flags)
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{
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struct page *new_page;
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struct tlbe *stlbe;
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hpa_t hpaddr;
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unsigned int victim;
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/* Future optimization: don't overwrite the TLB entry containing the
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* current PC (or stack?). */
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victim = kvmppc_tlb_44x_pos++;
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if (kvmppc_tlb_44x_pos > tlb_44x_hwater)
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kvmppc_tlb_44x_pos = 0;
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stlbe = &vcpu->arch.shadow_tlb[victim];
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/* Get reference to new page. */
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new_page = gfn_to_page(vcpu->kvm, gfn);
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if (is_error_page(new_page)) {
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printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn);
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kvm_release_page_clean(new_page);
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return;
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}
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hpaddr = page_to_phys(new_page);
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/* Drop reference to old page. */
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kvmppc_44x_shadow_release(vcpu, victim);
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vcpu->arch.shadow_pages[victim] = new_page;
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/* XXX Make sure (va, size) doesn't overlap any other
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* entries. 440x6 user manual says the result would be
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* "undefined." */
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/* XXX what about AS? */
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stlbe->tid = !(asid & 0xff);
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/* Force TS=1 for all guest mappings. */
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/* For now we hardcode 4KB mappings, but it will be important to
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* use host large pages in the future. */
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stlbe->word0 = (gvaddr & PAGE_MASK) | PPC44x_TLB_VALID | PPC44x_TLB_TS
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| PPC44x_TLB_4K;
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stlbe->word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf);
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stlbe->word2 = kvmppc_44x_tlb_shadow_attrib(flags,
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vcpu->arch.msr & MSR_PR);
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kvmppc_tlbe_set_modified(vcpu, victim);
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KVMTRACE_5D(STLB_WRITE, vcpu, victim,
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stlbe->tid, stlbe->word0, stlbe->word1, stlbe->word2,
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handler);
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}
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void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr,
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gva_t eend, u32 asid)
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{
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unsigned int pid = !(asid & 0xff);
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int i;
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/* XXX Replace loop with fancy data structures. */
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for (i = 0; i <= tlb_44x_hwater; i++) {
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struct tlbe *stlbe = &vcpu->arch.shadow_tlb[i];
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unsigned int tid;
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if (!get_tlb_v(stlbe))
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continue;
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if (eend < get_tlb_eaddr(stlbe))
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continue;
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if (eaddr > get_tlb_end(stlbe))
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continue;
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tid = get_tlb_tid(stlbe);
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if (tid && (tid != pid))
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continue;
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kvmppc_44x_shadow_release(vcpu, i);
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stlbe->word0 = 0;
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kvmppc_tlbe_set_modified(vcpu, i);
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KVMTRACE_5D(STLB_INVAL, vcpu, i,
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stlbe->tid, stlbe->word0, stlbe->word1,
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stlbe->word2, handler);
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}
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}
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/* Invalidate all mappings on the privilege switch after PID has been changed.
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* The guest always runs with PID=1, so we must clear the entire TLB when
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* switching address spaces. */
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void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode)
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{
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int i;
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if (vcpu->arch.swap_pid) {
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/* XXX Replace loop with fancy data structures. */
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for (i = 0; i <= tlb_44x_hwater; i++) {
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struct tlbe *stlbe = &vcpu->arch.shadow_tlb[i];
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/* Future optimization: clear only userspace mappings. */
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kvmppc_44x_shadow_release(vcpu, i);
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stlbe->word0 = 0;
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kvmppc_tlbe_set_modified(vcpu, i);
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KVMTRACE_5D(STLB_INVAL, vcpu, i,
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stlbe->tid, stlbe->word0, stlbe->word1,
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stlbe->word2, handler);
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}
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vcpu->arch.swap_pid = 0;
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}
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vcpu->arch.shadow_pid = !usermode;
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}
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