497 lines
12 KiB
C
497 lines
12 KiB
C
/*
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* Platform device support for Au1x00 SoCs.
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*
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* Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
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*
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* (C) Copyright Embedded Alley Solutions, Inc 2005
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* Author: Pantelis Antoniou <pantelis@embeddedalley.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/etherdevice.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/init.h>
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#include <asm/mach-au1x00/au1xxx.h>
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#include <asm/mach-au1x00/au1xxx_dbdma.h>
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#include <asm/mach-au1x00/au1100_mmc.h>
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#include <asm/mach-au1x00/au1xxx_eth.h>
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#include <prom.h>
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static void alchemy_8250_pm(struct uart_port *port, unsigned int state,
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unsigned int old_state)
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{
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#ifdef CONFIG_SERIAL_8250
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switch (state) {
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case 0:
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if ((__raw_readl(port->membase + UART_MOD_CNTRL) & 3) != 3) {
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/* power-on sequence as suggested in the databooks */
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__raw_writel(0, port->membase + UART_MOD_CNTRL);
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wmb();
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__raw_writel(1, port->membase + UART_MOD_CNTRL);
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wmb();
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}
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__raw_writel(3, port->membase + UART_MOD_CNTRL); /* full on */
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wmb();
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serial8250_do_pm(port, state, old_state);
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break;
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case 3: /* power off */
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serial8250_do_pm(port, state, old_state);
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__raw_writel(0, port->membase + UART_MOD_CNTRL);
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wmb();
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break;
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default:
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serial8250_do_pm(port, state, old_state);
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break;
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}
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#endif
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}
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#define PORT(_base, _irq) \
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{ \
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.mapbase = _base, \
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.irq = _irq, \
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.regshift = 2, \
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.iotype = UPIO_AU, \
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.flags = UPF_SKIP_TEST | UPF_IOREMAP | \
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UPF_FIXED_TYPE, \
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.type = PORT_16550A, \
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.pm = alchemy_8250_pm, \
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}
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static struct plat_serial8250_port au1x00_uart_data[] = {
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#if defined(CONFIG_SOC_AU1000)
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PORT(UART0_PHYS_ADDR, AU1000_UART0_INT),
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PORT(UART1_PHYS_ADDR, AU1000_UART1_INT),
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PORT(UART2_PHYS_ADDR, AU1000_UART2_INT),
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PORT(UART3_PHYS_ADDR, AU1000_UART3_INT),
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#elif defined(CONFIG_SOC_AU1500)
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PORT(UART0_PHYS_ADDR, AU1500_UART0_INT),
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PORT(UART3_PHYS_ADDR, AU1500_UART3_INT),
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#elif defined(CONFIG_SOC_AU1100)
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PORT(UART0_PHYS_ADDR, AU1100_UART0_INT),
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PORT(UART1_PHYS_ADDR, AU1100_UART1_INT),
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PORT(UART3_PHYS_ADDR, AU1100_UART3_INT),
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#elif defined(CONFIG_SOC_AU1550)
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PORT(UART0_PHYS_ADDR, AU1550_UART0_INT),
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PORT(UART1_PHYS_ADDR, AU1550_UART1_INT),
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PORT(UART3_PHYS_ADDR, AU1550_UART3_INT),
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#elif defined(CONFIG_SOC_AU1200)
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PORT(UART0_PHYS_ADDR, AU1200_UART0_INT),
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PORT(UART1_PHYS_ADDR, AU1200_UART1_INT),
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#endif
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{ },
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};
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static struct platform_device au1xx0_uart_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_AU1X00,
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.dev = {
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.platform_data = au1x00_uart_data,
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},
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};
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/* OHCI (USB full speed host controller) */
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static struct resource au1xxx_usb_ohci_resources[] = {
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[0] = {
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.start = USB_OHCI_BASE,
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.end = USB_OHCI_BASE + USB_OHCI_LEN - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = FOR_PLATFORM_C_USB_HOST_INT,
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.end = FOR_PLATFORM_C_USB_HOST_INT,
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.flags = IORESOURCE_IRQ,
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},
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};
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/* The dmamask must be set for OHCI to work */
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static u64 ohci_dmamask = DMA_BIT_MASK(32);
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static struct platform_device au1xxx_usb_ohci_device = {
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.name = "au1xxx-ohci",
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.id = 0,
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.dev = {
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.dma_mask = &ohci_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
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.resource = au1xxx_usb_ohci_resources,
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};
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/*** AU1100 LCD controller ***/
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#ifdef CONFIG_FB_AU1100
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static struct resource au1100_lcd_resources[] = {
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[0] = {
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.start = LCD_PHYS_ADDR,
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.end = LCD_PHYS_ADDR + 0x800 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1100_LCD_INT,
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.end = AU1100_LCD_INT,
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.flags = IORESOURCE_IRQ,
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}
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};
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static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
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static struct platform_device au1100_lcd_device = {
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.name = "au1100-lcd",
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.id = 0,
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.dev = {
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.dma_mask = &au1100_lcd_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(au1100_lcd_resources),
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.resource = au1100_lcd_resources,
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};
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#endif
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#ifdef CONFIG_SOC_AU1200
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/* EHCI (USB high speed host controller) */
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static struct resource au1xxx_usb_ehci_resources[] = {
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[0] = {
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.start = USB_EHCI_BASE,
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.end = USB_EHCI_BASE + USB_EHCI_LEN - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1200_USB_INT,
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.end = AU1200_USB_INT,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 ehci_dmamask = DMA_BIT_MASK(32);
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static struct platform_device au1xxx_usb_ehci_device = {
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.name = "au1xxx-ehci",
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.id = 0,
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.dev = {
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.dma_mask = &ehci_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
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.resource = au1xxx_usb_ehci_resources,
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};
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/* Au1200 UDC (USB gadget controller) */
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static struct resource au1xxx_usb_gdt_resources[] = {
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[0] = {
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.start = USB_UDC_BASE,
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.end = USB_UDC_BASE + USB_UDC_LEN - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1200_USB_INT,
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.end = AU1200_USB_INT,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 udc_dmamask = DMA_BIT_MASK(32);
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static struct platform_device au1xxx_usb_gdt_device = {
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.name = "au1xxx-udc",
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.id = 0,
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.dev = {
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.dma_mask = &udc_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
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.resource = au1xxx_usb_gdt_resources,
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};
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/* Au1200 UOC (USB OTG controller) */
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static struct resource au1xxx_usb_otg_resources[] = {
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[0] = {
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.start = USB_UOC_BASE,
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.end = USB_UOC_BASE + USB_UOC_LEN - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1200_USB_INT,
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.end = AU1200_USB_INT,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 uoc_dmamask = DMA_BIT_MASK(32);
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static struct platform_device au1xxx_usb_otg_device = {
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.name = "au1xxx-uoc",
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.id = 0,
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.dev = {
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.dma_mask = &uoc_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
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.resource = au1xxx_usb_otg_resources,
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};
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static struct resource au1200_lcd_resources[] = {
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[0] = {
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.start = LCD_PHYS_ADDR,
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.end = LCD_PHYS_ADDR + 0x800 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1200_LCD_INT,
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.end = AU1200_LCD_INT,
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.flags = IORESOURCE_IRQ,
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}
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};
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static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);
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static struct platform_device au1200_lcd_device = {
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.name = "au1200-lcd",
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.id = 0,
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.dev = {
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.dma_mask = &au1200_lcd_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(au1200_lcd_resources),
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.resource = au1200_lcd_resources,
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};
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static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32);
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extern struct au1xmmc_platform_data au1xmmc_platdata[2];
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static struct resource au1200_mmc0_resources[] = {
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[0] = {
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.start = SD0_PHYS_ADDR,
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.end = SD0_PHYS_ADDR + 0x7ffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1200_SD_INT,
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.end = AU1200_SD_INT,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = DSCR_CMD0_SDMS_TX0,
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.end = DSCR_CMD0_SDMS_TX0,
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.flags = IORESOURCE_DMA,
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},
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[3] = {
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.start = DSCR_CMD0_SDMS_RX0,
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.end = DSCR_CMD0_SDMS_RX0,
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.flags = IORESOURCE_DMA,
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}
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};
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static struct platform_device au1200_mmc0_device = {
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.name = "au1xxx-mmc",
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.id = 0,
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.dev = {
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.dma_mask = &au1xxx_mmc_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &au1xmmc_platdata[0],
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},
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.num_resources = ARRAY_SIZE(au1200_mmc0_resources),
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.resource = au1200_mmc0_resources,
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};
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#ifndef CONFIG_MIPS_DB1200
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static struct resource au1200_mmc1_resources[] = {
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[0] = {
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.start = SD1_PHYS_ADDR,
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.end = SD1_PHYS_ADDR + 0x7ffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1200_SD_INT,
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.end = AU1200_SD_INT,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = DSCR_CMD0_SDMS_TX1,
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.end = DSCR_CMD0_SDMS_TX1,
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.flags = IORESOURCE_DMA,
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},
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[3] = {
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.start = DSCR_CMD0_SDMS_RX1,
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.end = DSCR_CMD0_SDMS_RX1,
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.flags = IORESOURCE_DMA,
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}
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};
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static struct platform_device au1200_mmc1_device = {
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.name = "au1xxx-mmc",
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.id = 1,
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.dev = {
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.dma_mask = &au1xxx_mmc_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &au1xmmc_platdata[1],
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},
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.num_resources = ARRAY_SIZE(au1200_mmc1_resources),
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.resource = au1200_mmc1_resources,
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};
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#endif /* #ifndef CONFIG_MIPS_DB1200 */
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#endif /* #ifdef CONFIG_SOC_AU1200 */
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/* All Alchemy demoboards with I2C have this #define in their headers */
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#ifdef SMBUS_PSC_BASE
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static struct resource pbdb_smbus_resources[] = {
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{
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.start = CPHYSADDR(SMBUS_PSC_BASE),
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.end = CPHYSADDR(SMBUS_PSC_BASE + 0xfffff),
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device pbdb_smbus_device = {
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.name = "au1xpsc_smbus",
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.id = 0, /* bus number */
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.num_resources = ARRAY_SIZE(pbdb_smbus_resources),
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.resource = pbdb_smbus_resources,
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};
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#endif
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/* Macro to help defining the Ethernet MAC resources */
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#define MAC_RES(_base, _enable, _irq) \
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{ \
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.start = CPHYSADDR(_base), \
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.end = CPHYSADDR(_base + 0xffff), \
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.flags = IORESOURCE_MEM, \
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}, \
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{ \
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.start = CPHYSADDR(_enable), \
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.end = CPHYSADDR(_enable + 0x3), \
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.flags = IORESOURCE_MEM, \
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}, \
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{ \
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.start = _irq, \
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.end = _irq, \
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.flags = IORESOURCE_IRQ \
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}
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static struct resource au1xxx_eth0_resources[] = {
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#if defined(CONFIG_SOC_AU1000)
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MAC_RES(AU1000_ETH0_BASE, AU1000_MAC0_ENABLE, AU1000_MAC0_DMA_INT),
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#elif defined(CONFIG_SOC_AU1100)
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MAC_RES(AU1100_ETH0_BASE, AU1100_MAC0_ENABLE, AU1100_MAC0_DMA_INT),
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#elif defined(CONFIG_SOC_AU1550)
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MAC_RES(AU1550_ETH0_BASE, AU1550_MAC0_ENABLE, AU1550_MAC0_DMA_INT),
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#elif defined(CONFIG_SOC_AU1500)
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MAC_RES(AU1500_ETH0_BASE, AU1500_MAC0_ENABLE, AU1500_MAC0_DMA_INT),
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#endif
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};
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static struct au1000_eth_platform_data au1xxx_eth0_platform_data = {
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.phy1_search_mac0 = 1,
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};
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static struct platform_device au1xxx_eth0_device = {
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.name = "au1000-eth",
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.id = 0,
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.num_resources = ARRAY_SIZE(au1xxx_eth0_resources),
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.resource = au1xxx_eth0_resources,
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.dev.platform_data = &au1xxx_eth0_platform_data,
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};
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#ifndef CONFIG_SOC_AU1100
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static struct resource au1xxx_eth1_resources[] = {
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#if defined(CONFIG_SOC_AU1000)
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MAC_RES(AU1000_ETH1_BASE, AU1000_MAC1_ENABLE, AU1000_MAC1_DMA_INT),
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#elif defined(CONFIG_SOC_AU1550)
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MAC_RES(AU1550_ETH1_BASE, AU1550_MAC1_ENABLE, AU1550_MAC1_DMA_INT),
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#elif defined(CONFIG_SOC_AU1500)
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MAC_RES(AU1500_ETH1_BASE, AU1500_MAC1_ENABLE, AU1500_MAC1_DMA_INT),
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#endif
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};
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static struct au1000_eth_platform_data au1xxx_eth1_platform_data = {
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.phy1_search_mac0 = 1,
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};
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static struct platform_device au1xxx_eth1_device = {
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.name = "au1000-eth",
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.id = 1,
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.num_resources = ARRAY_SIZE(au1xxx_eth1_resources),
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.resource = au1xxx_eth1_resources,
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.dev.platform_data = &au1xxx_eth1_platform_data,
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};
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#endif
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void __init au1xxx_override_eth_cfg(unsigned int port,
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struct au1000_eth_platform_data *eth_data)
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{
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if (!eth_data || port > 1)
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return;
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if (port == 0)
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memcpy(&au1xxx_eth0_platform_data, eth_data,
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sizeof(struct au1000_eth_platform_data));
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#ifndef CONFIG_SOC_AU1100
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else
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memcpy(&au1xxx_eth1_platform_data, eth_data,
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sizeof(struct au1000_eth_platform_data));
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#endif
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}
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static struct platform_device *au1xxx_platform_devices[] __initdata = {
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&au1xx0_uart_device,
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&au1xxx_usb_ohci_device,
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#ifdef CONFIG_FB_AU1100
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&au1100_lcd_device,
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#endif
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#ifdef CONFIG_SOC_AU1200
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&au1xxx_usb_ehci_device,
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&au1xxx_usb_gdt_device,
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&au1xxx_usb_otg_device,
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&au1200_lcd_device,
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&au1200_mmc0_device,
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#ifndef CONFIG_MIPS_DB1200
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&au1200_mmc1_device,
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#endif
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#endif
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#ifdef SMBUS_PSC_BASE
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&pbdb_smbus_device,
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#endif
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&au1xxx_eth0_device,
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};
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static int __init au1xxx_platform_init(void)
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{
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unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
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int err, i;
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unsigned char ethaddr[6];
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/* Fill up uartclk. */
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for (i = 0; au1x00_uart_data[i].flags; i++)
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au1x00_uart_data[i].uartclk = uartclk;
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/* use firmware-provided mac addr if available and necessary */
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i = prom_get_ethernet_addr(ethaddr);
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if (!i && !is_valid_ether_addr(au1xxx_eth0_platform_data.mac))
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memcpy(au1xxx_eth0_platform_data.mac, ethaddr, 6);
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err = platform_add_devices(au1xxx_platform_devices,
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ARRAY_SIZE(au1xxx_platform_devices));
|
|
#ifndef CONFIG_SOC_AU1100
|
|
ethaddr[5] += 1; /* next addr for 2nd MAC */
|
|
if (!i && !is_valid_ether_addr(au1xxx_eth1_platform_data.mac))
|
|
memcpy(au1xxx_eth1_platform_data.mac, ethaddr, 6);
|
|
|
|
/* Register second MAC if enabled in pinfunc */
|
|
if (!err && !(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2))
|
|
err = platform_device_register(&au1xxx_eth1_device);
|
|
#endif
|
|
|
|
return err;
|
|
}
|
|
|
|
arch_initcall(au1xxx_platform_init);
|