173 lines
4.1 KiB
C
173 lines
4.1 KiB
C
/*
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* Copyright 2010-2011 Calxeda, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/of_address.h>
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#include <linux/smp.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_scu.h>
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#include <asm/smp_twd.h>
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#include <asm/hardware/arm_timer.h>
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#include <asm/hardware/timer-sp.h>
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#include <asm/hardware/gic.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include "core.h"
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#include "sysregs.h"
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void __iomem *sregs_base;
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#define HB_SCU_VIRT_BASE 0xfee00000
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void __iomem *scu_base_addr = ((void __iomem *)(HB_SCU_VIRT_BASE));
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static struct map_desc scu_io_desc __initdata = {
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.virtual = HB_SCU_VIRT_BASE,
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.pfn = 0, /* run-time */
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.length = SZ_4K,
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.type = MT_DEVICE,
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};
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static void __init highbank_scu_map_io(void)
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{
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unsigned long base;
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/* Get SCU base */
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asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
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scu_io_desc.pfn = __phys_to_pfn(base);
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iotable_init(&scu_io_desc, 1);
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}
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static void __init highbank_map_io(void)
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{
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highbank_scu_map_io();
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highbank_lluart_map_io();
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}
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#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu)))
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#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
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void highbank_set_cpu_jump(int cpu, void *jump_addr)
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{
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cpu = cpu_logical_map(cpu);
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writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
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__cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
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outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
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HB_JUMP_TABLE_PHYS(cpu) + 15);
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}
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const static struct of_device_id irq_match[] = {
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{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
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{}
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};
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#ifdef CONFIG_CACHE_L2X0
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static void highbank_l2x0_disable(void)
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{
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/* Disable PL310 L2 Cache controller */
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highbank_smc1(0x102, 0x0);
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}
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#endif
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static void __init highbank_init_irq(void)
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{
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of_irq_init(irq_match);
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#ifdef CONFIG_CACHE_L2X0
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/* Enable PL310 L2 Cache controller */
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highbank_smc1(0x102, 0x1);
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l2x0_of_init(0, ~0UL);
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outer_cache.disable = highbank_l2x0_disable;
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#endif
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}
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static struct clk_lookup lookup = {
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.dev_id = "sp804",
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.con_id = NULL,
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};
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static void __init highbank_timer_init(void)
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{
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int irq;
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struct device_node *np;
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void __iomem *timer_base;
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/* Map system registers */
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np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
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sregs_base = of_iomap(np, 0);
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WARN_ON(!sregs_base);
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np = of_find_compatible_node(NULL, NULL, "arm,sp804");
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timer_base = of_iomap(np, 0);
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WARN_ON(!timer_base);
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irq = irq_of_parse_and_map(np, 0);
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highbank_clocks_init();
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lookup.clk = of_clk_get(np, 0);
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clkdev_add(&lookup);
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sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1");
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sp804_clockevents_init(timer_base, irq, "timer0");
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twd_local_timer_of_register();
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}
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static struct sys_timer highbank_timer = {
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.init = highbank_timer_init,
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};
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static void highbank_power_off(void)
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{
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hignbank_set_pwr_shutdown();
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scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
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while (1)
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cpu_do_idle();
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}
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static void __init highbank_init(void)
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{
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pm_power_off = highbank_power_off;
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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static const char *highbank_match[] __initconst = {
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"calxeda,highbank",
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NULL,
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};
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DT_MACHINE_START(HIGHBANK, "Highbank")
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.map_io = highbank_map_io,
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.init_irq = highbank_init_irq,
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.timer = &highbank_timer,
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.handle_irq = gic_handle_irq,
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.init_machine = highbank_init,
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.dt_compat = highbank_match,
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.restart = highbank_restart,
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MACHINE_END
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