386 lines
10 KiB
C
386 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Texas Instruments LMP92064 SPI ADC driver
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*
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* Copyright (c) 2022 Leonard Göhrs <kernel@pengutronix.de>, Pengutronix
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*
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* Based on linux/drivers/iio/adc/ti-tsc2046.c
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* Copyright (c) 2021 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
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*/
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/spi/spi.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/driver.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#define TI_LMP92064_REG_CONFIG_A 0x0000
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#define TI_LMP92064_REG_CONFIG_B 0x0001
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#define TI_LMP92064_REG_CHIP_REV 0x0006
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#define TI_LMP92064_REG_MFR_ID1 0x000C
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#define TI_LMP92064_REG_MFR_ID2 0x000D
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#define TI_LMP92064_REG_REG_UPDATE 0x000F
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#define TI_LMP92064_REG_CONFIG_REG 0x0100
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#define TI_LMP92064_REG_STATUS 0x0103
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#define TI_LMP92064_REG_DATA_VOUT_LSB 0x0200
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#define TI_LMP92064_REG_DATA_VOUT_MSB 0x0201
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#define TI_LMP92064_REG_DATA_COUT_LSB 0x0202
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#define TI_LMP92064_REG_DATA_COUT_MSB 0x0203
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#define TI_LMP92064_VAL_CONFIG_A 0x99
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#define TI_LMP92064_VAL_CONFIG_B 0x00
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#define TI_LMP92064_VAL_STATUS_OK 0x01
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/*
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* Channel number definitions for the two channels of the device
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* - IN Current (INC)
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* - IN Voltage (INV)
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*/
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#define TI_LMP92064_CHAN_INC 0
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#define TI_LMP92064_CHAN_INV 1
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static const struct regmap_range lmp92064_readable_reg_ranges[] = {
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regmap_reg_range(TI_LMP92064_REG_CONFIG_A, TI_LMP92064_REG_CHIP_REV),
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regmap_reg_range(TI_LMP92064_REG_MFR_ID1, TI_LMP92064_REG_MFR_ID2),
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regmap_reg_range(TI_LMP92064_REG_REG_UPDATE, TI_LMP92064_REG_REG_UPDATE),
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regmap_reg_range(TI_LMP92064_REG_CONFIG_REG, TI_LMP92064_REG_CONFIG_REG),
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regmap_reg_range(TI_LMP92064_REG_STATUS, TI_LMP92064_REG_STATUS),
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regmap_reg_range(TI_LMP92064_REG_DATA_VOUT_LSB, TI_LMP92064_REG_DATA_COUT_MSB),
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};
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static const struct regmap_access_table lmp92064_readable_regs = {
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.yes_ranges = lmp92064_readable_reg_ranges,
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.n_yes_ranges = ARRAY_SIZE(lmp92064_readable_reg_ranges),
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};
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static const struct regmap_range lmp92064_writable_reg_ranges[] = {
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regmap_reg_range(TI_LMP92064_REG_CONFIG_A, TI_LMP92064_REG_CONFIG_B),
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regmap_reg_range(TI_LMP92064_REG_REG_UPDATE, TI_LMP92064_REG_REG_UPDATE),
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regmap_reg_range(TI_LMP92064_REG_CONFIG_REG, TI_LMP92064_REG_CONFIG_REG),
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};
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static const struct regmap_access_table lmp92064_writable_regs = {
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.yes_ranges = lmp92064_writable_reg_ranges,
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.n_yes_ranges = ARRAY_SIZE(lmp92064_writable_reg_ranges),
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};
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static const struct regmap_config lmp92064_spi_regmap_config = {
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.reg_bits = 16,
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.val_bits = 8,
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.max_register = TI_LMP92064_REG_DATA_COUT_MSB,
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.rd_table = &lmp92064_readable_regs,
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.wr_table = &lmp92064_writable_regs,
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};
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struct lmp92064_adc_priv {
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int shunt_resistor_uohm;
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struct spi_device *spi;
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struct regmap *regmap;
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};
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static const struct iio_chan_spec lmp92064_adc_channels[] = {
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{
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.type = IIO_CURRENT,
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.address = TI_LMP92064_CHAN_INC,
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.info_mask_separate =
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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.scan_index = TI_LMP92064_CHAN_INC,
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.scan_type = {
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.sign = 'u',
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.realbits = 12,
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.storagebits = 16,
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},
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.datasheet_name = "INC",
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},
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{
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.type = IIO_VOLTAGE,
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.address = TI_LMP92064_CHAN_INV,
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.info_mask_separate =
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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.scan_index = TI_LMP92064_CHAN_INV,
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.scan_type = {
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.sign = 'u',
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.realbits = 12,
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.storagebits = 16,
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},
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.datasheet_name = "INV",
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},
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IIO_CHAN_SOFT_TIMESTAMP(2),
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};
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static const unsigned long lmp92064_scan_masks[] = {
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BIT(TI_LMP92064_CHAN_INC) | BIT(TI_LMP92064_CHAN_INV),
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0
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};
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static int lmp92064_read_meas(struct lmp92064_adc_priv *priv, u16 *res)
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{
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__be16 raw[2];
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int ret;
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/*
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* The ADC only latches in new samples if all DATA registers are read
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* in descending sequential order.
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* The ADC auto-decrements the register index with each clocked byte.
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* Read both channels in single SPI transfer by selecting the highest
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* register using the command below and clocking out all four data
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* bytes.
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*/
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ret = regmap_bulk_read(priv->regmap, TI_LMP92064_REG_DATA_COUT_MSB,
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&raw, sizeof(raw));
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if (ret) {
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dev_err(&priv->spi->dev, "regmap_bulk_read failed: %pe\n",
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ERR_PTR(ret));
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return ret;
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}
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res[0] = be16_to_cpu(raw[0]);
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res[1] = be16_to_cpu(raw[1]);
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return 0;
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}
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static int lmp92064_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val,
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int *val2, long mask)
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{
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struct lmp92064_adc_priv *priv = iio_priv(indio_dev);
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u16 raw[2];
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = lmp92064_read_meas(priv, raw);
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if (ret < 0)
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return ret;
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*val = (chan->address == TI_LMP92064_CHAN_INC) ? raw[0] : raw[1];
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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if (chan->address == TI_LMP92064_CHAN_INC) {
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/*
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* processed (mA) = raw * current_lsb (mA)
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* current_lsb (mA) = shunt_voltage_lsb (nV) / shunt_resistor (uOhm)
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* shunt_voltage_lsb (nV) = 81920000 / 4096 = 20000
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*/
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*val = 20000;
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*val2 = priv->shunt_resistor_uohm;
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} else {
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/*
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* processed (mV) = raw * voltage_lsb (mV)
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* voltage_lsb (mV) = 2048 / 4096
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*/
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*val = 2048;
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*val2 = 4096;
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}
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return IIO_VAL_FRACTIONAL;
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default:
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return -EINVAL;
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}
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}
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static irqreturn_t lmp92064_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct lmp92064_adc_priv *priv = iio_priv(indio_dev);
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struct {
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u16 values[2];
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int64_t timestamp __aligned(8);
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} data;
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int ret;
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memset(&data, 0, sizeof(data));
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ret = lmp92064_read_meas(priv, data.values);
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if (ret)
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goto err;
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iio_push_to_buffers_with_timestamp(indio_dev, &data,
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iio_get_time_ns(indio_dev));
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err:
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static int lmp92064_reset(struct lmp92064_adc_priv *priv,
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struct gpio_desc *gpio_reset)
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{
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unsigned int status;
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int ret, i;
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if (gpio_reset) {
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/*
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* Perform a hard reset if gpio_reset is available.
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* The datasheet specifies a very low 3.5ns reset pulse duration and does not
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* specify how long to wait after a reset to access the device.
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* Use more conservative pulse lengths to allow analog RC filtering of the
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* reset line at the board level (as recommended in the datasheet).
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*/
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gpiod_set_value_cansleep(gpio_reset, 1);
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usleep_range(1, 10);
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gpiod_set_value_cansleep(gpio_reset, 0);
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usleep_range(500, 750);
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} else {
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/*
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* Perform a soft-reset if not.
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* Also write default values to the config registers that are not
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* affected by soft reset.
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*/
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ret = regmap_write(priv->regmap, TI_LMP92064_REG_CONFIG_A,
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TI_LMP92064_VAL_CONFIG_A);
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if (ret < 0)
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return ret;
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ret = regmap_write(priv->regmap, TI_LMP92064_REG_CONFIG_B,
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TI_LMP92064_VAL_CONFIG_B);
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if (ret < 0)
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return ret;
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}
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/*
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* Wait for the device to signal readiness to prevent reading bogus data
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* and make sure device is actually connected.
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* The datasheet does not specify how long this takes but usually it is
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* not more than 3-4 iterations of this loop.
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*/
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for (i = 0; i < 10; i++) {
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ret = regmap_read(priv->regmap, TI_LMP92064_REG_STATUS, &status);
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if (ret < 0)
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return ret;
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if (status == TI_LMP92064_VAL_STATUS_OK)
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return 0;
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usleep_range(1000, 2000);
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}
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/*
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* No (correct) response received.
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* Device is mostly likely not connected to the bus.
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*/
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return -ENXIO;
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}
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static const struct iio_info lmp92064_adc_info = {
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.read_raw = lmp92064_read_raw,
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};
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static int lmp92064_adc_probe(struct spi_device *spi)
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{
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struct device *dev = &spi->dev;
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struct lmp92064_adc_priv *priv;
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struct gpio_desc *gpio_reset;
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struct iio_dev *indio_dev;
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u32 shunt_resistor_uohm;
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struct regmap *regmap;
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int ret;
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ret = spi_setup(spi);
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if (ret < 0)
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return dev_err_probe(dev, ret, "Error in SPI setup\n");
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regmap = devm_regmap_init_spi(spi, &lmp92064_spi_regmap_config);
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if (IS_ERR(regmap))
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return dev_err_probe(dev, PTR_ERR(regmap),
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"Failed to set up SPI regmap\n");
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indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
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if (!indio_dev)
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return -ENOMEM;
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priv = iio_priv(indio_dev);
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priv->spi = spi;
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priv->regmap = regmap;
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ret = device_property_read_u32(dev, "shunt-resistor-micro-ohms",
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&shunt_resistor_uohm);
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if (ret < 0)
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return dev_err_probe(dev, ret,
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"Failed to get shunt-resistor value\n");
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/*
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* The shunt resistance is passed to userspace as the denominator of an iio
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* fraction. Make sure it is in range for that.
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*/
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if (shunt_resistor_uohm == 0 || shunt_resistor_uohm > INT_MAX) {
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dev_err(dev, "Shunt resistance is out of range\n");
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return -EINVAL;
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}
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priv->shunt_resistor_uohm = shunt_resistor_uohm;
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ret = devm_regulator_get_enable(dev, "vdd");
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if (ret)
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return ret;
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ret = devm_regulator_get_enable(dev, "vdig");
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if (ret)
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return ret;
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gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
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if (IS_ERR(gpio_reset))
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return dev_err_probe(dev, PTR_ERR(gpio_reset),
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"Failed to get GPIO reset pin\n");
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ret = lmp92064_reset(priv, gpio_reset);
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if (ret < 0)
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return dev_err_probe(dev, ret, "Failed to reset device\n");
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indio_dev->name = "lmp92064";
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = lmp92064_adc_channels;
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indio_dev->num_channels = ARRAY_SIZE(lmp92064_adc_channels);
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indio_dev->info = &lmp92064_adc_info;
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indio_dev->available_scan_masks = lmp92064_scan_masks;
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ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
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lmp92064_trigger_handler, NULL);
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if (ret)
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return dev_err_probe(dev, ret, "Failed to setup buffered read\n");
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return devm_iio_device_register(dev, indio_dev);
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}
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static const struct spi_device_id lmp92064_id_table[] = {
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{ "lmp92064" },
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{}
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};
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MODULE_DEVICE_TABLE(spi, lmp92064_id_table);
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static const struct of_device_id lmp92064_of_table[] = {
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{ .compatible = "ti,lmp92064" },
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{}
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};
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MODULE_DEVICE_TABLE(of, lmp92064_of_table);
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static struct spi_driver lmp92064_adc_driver = {
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.driver = {
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.name = "lmp92064",
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.of_match_table = lmp92064_of_table,
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},
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.probe = lmp92064_adc_probe,
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.id_table = lmp92064_id_table,
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};
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module_spi_driver(lmp92064_adc_driver);
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MODULE_AUTHOR("Leonard Göhrs <kernel@pengutronix.de>");
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MODULE_DESCRIPTION("TI LMP92064 ADC");
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MODULE_LICENSE("GPL");
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