440 lines
10 KiB
C
440 lines
10 KiB
C
/*
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* Derived from arch/i386/kernel/irq.c
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* Copyright (C) 1992 Linus Torvalds
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* Adapted from arch/i386 by Gary Thomas
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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* Updated and modified by Cort Dougan <cort@fsmlabs.com>
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* Copyright (C) 1996-2001 Cort Dougan
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* Adapted for Power Macintosh by Paul Mackerras
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* Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
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* Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* This file contains the code used by various IRQ handling routines:
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* asking for different IRQ's should be done through these routines
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* instead of just grabbing them. Thus setups with different IRQ numbers
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* shouldn't result in any weird surprises, and installing new handlers
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* should be easier.
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*
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* The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
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* interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
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* mask register (of which only 16 are defined), hence the weird shifting
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* and complement of the cached_irq_mask. I want to be able to stuff
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* this right into the SIU SMASK register.
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* Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
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* to reduce code space and undefined function references.
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*/
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#include <linux/module.h>
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#include <linux/threads.h>
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#include <linux/kernel_stat.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/ptrace.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/timex.h>
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#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/seq_file.h>
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#include <linux/cpumask.h>
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#include <linux/profile.h>
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#include <linux/bitops.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/irq.h>
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#include <asm/cache.h>
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#include <asm/prom.h>
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#include <asm/ptrace.h>
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#include <asm/machdep.h>
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#ifdef CONFIG_PPC_ISERIES
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#include <asm/paca.h>
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#endif
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int __irq_offset_value;
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#ifdef CONFIG_PPC32
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EXPORT_SYMBOL(__irq_offset_value);
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#endif
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static int ppc_spurious_interrupts;
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#ifdef CONFIG_PPC32
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#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
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unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
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atomic_t ppc_n_lost_interrupts;
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#ifdef CONFIG_TAU_INT
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extern int tau_initialized;
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extern int tau_interrupts(int);
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#endif
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#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
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extern atomic_t ipi_recv;
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extern atomic_t ipi_sent;
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#endif
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#endif /* CONFIG_PPC32 */
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#ifdef CONFIG_PPC64
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EXPORT_SYMBOL(irq_desc);
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int distribute_irqs = 1;
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u64 ppc64_interrupt_controller;
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#endif /* CONFIG_PPC64 */
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int show_interrupts(struct seq_file *p, void *v)
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{
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int i = *(loff_t *)v, j;
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struct irqaction *action;
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irq_desc_t *desc;
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unsigned long flags;
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if (i == 0) {
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seq_puts(p, " ");
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for_each_online_cpu(j)
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seq_printf(p, "CPU%d ", j);
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seq_putc(p, '\n');
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}
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if (i < NR_IRQS) {
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desc = get_irq_desc(i);
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spin_lock_irqsave(&desc->lock, flags);
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action = desc->action;
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if (!action || !action->handler)
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goto skip;
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seq_printf(p, "%3d: ", i);
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#ifdef CONFIG_SMP
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
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#else
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seq_printf(p, "%10u ", kstat_irqs(i));
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#endif /* CONFIG_SMP */
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if (desc->handler)
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seq_printf(p, " %s ", desc->handler->typename);
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else
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seq_puts(p, " None ");
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seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge ");
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seq_printf(p, " %s", action->name);
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for (action = action->next; action; action = action->next)
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seq_printf(p, ", %s", action->name);
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seq_putc(p, '\n');
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skip:
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spin_unlock_irqrestore(&desc->lock, flags);
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} else if (i == NR_IRQS) {
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#ifdef CONFIG_PPC32
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#ifdef CONFIG_TAU_INT
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if (tau_initialized){
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seq_puts(p, "TAU: ");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", tau_interrupts(j));
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seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
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}
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#endif
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#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
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/* should this be per processor send/receive? */
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seq_printf(p, "IPI (recv/sent): %10u/%u\n",
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atomic_read(&ipi_recv), atomic_read(&ipi_sent));
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#endif
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#endif /* CONFIG_PPC32 */
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seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
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}
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return 0;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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void fixup_irqs(cpumask_t map)
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{
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unsigned int irq;
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static int warned;
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for_each_irq(irq) {
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cpumask_t mask;
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if (irq_desc[irq].status & IRQ_PER_CPU)
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continue;
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cpus_and(mask, irq_affinity[irq], map);
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if (any_online_cpu(mask) == NR_CPUS) {
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printk("Breaking affinity for irq %i\n", irq);
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mask = map;
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}
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if (irq_desc[irq].handler->set_affinity)
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irq_desc[irq].handler->set_affinity(irq, mask);
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else if (irq_desc[irq].action && !(warned++))
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printk("Cannot set affinity for irq %i\n", irq);
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}
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local_irq_enable();
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mdelay(1);
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local_irq_disable();
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}
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#endif
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void do_IRQ(struct pt_regs *regs)
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{
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int irq;
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#ifdef CONFIG_IRQSTACKS
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struct thread_info *curtp, *irqtp;
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#endif
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irq_enter();
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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/* Debugging check for stack overflow: is there less than 2KB free? */
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{
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long sp;
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sp = __get_SP() & (THREAD_SIZE-1);
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if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
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printk("do_IRQ: stack overflow: %ld\n",
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sp - sizeof(struct thread_info));
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dump_stack();
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}
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}
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#endif
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/*
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* Every platform is required to implement ppc_md.get_irq.
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* This function will either return an irq number or -1 to
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* indicate there are no more pending.
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* The value -2 is for buggy hardware and means that this IRQ
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* has already been handled. -- Tom
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*/
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irq = ppc_md.get_irq(regs);
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if (irq >= 0) {
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#ifdef CONFIG_IRQSTACKS
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/* Switch to the irq stack to handle this */
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curtp = current_thread_info();
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irqtp = hardirq_ctx[smp_processor_id()];
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if (curtp != irqtp) {
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irqtp->task = curtp->task;
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irqtp->flags = 0;
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call___do_IRQ(irq, regs, irqtp);
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irqtp->task = NULL;
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if (irqtp->flags)
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set_bits(irqtp->flags, &curtp->flags);
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} else
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#endif
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__do_IRQ(irq, regs);
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} else if (irq != -2)
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/* That's not SMP safe ... but who cares ? */
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ppc_spurious_interrupts++;
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irq_exit();
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#ifdef CONFIG_PPC_ISERIES
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if (get_lppaca()->int_dword.fields.decr_int) {
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get_lppaca()->int_dword.fields.decr_int = 0;
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/* Signal a fake decrementer interrupt */
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timer_interrupt(regs);
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}
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#endif
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}
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void __init init_IRQ(void)
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{
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#ifdef CONFIG_PPC64
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static int once = 0;
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if (once)
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return;
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once++;
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#endif
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ppc_md.init_IRQ();
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#ifdef CONFIG_PPC64
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irq_ctx_init();
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#endif
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}
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#ifdef CONFIG_PPC64
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/*
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* Virtual IRQ mapping code, used on systems with XICS interrupt controllers.
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*/
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#define UNDEFINED_IRQ 0xffffffff
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unsigned int virt_irq_to_real_map[NR_IRQS];
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/*
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* Don't use virtual irqs 0, 1, 2 for devices.
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* The pcnet32 driver considers interrupt numbers < 2 to be invalid,
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* and 2 is the XICS IPI interrupt.
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* We limit virtual irqs to 17 less than NR_IRQS so that when we
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* offset them by 16 (to reserve the first 16 for ISA interrupts)
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* we don't end up with an interrupt number >= NR_IRQS.
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*/
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#define MIN_VIRT_IRQ 3
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#define MAX_VIRT_IRQ (NR_IRQS - NUM_ISA_INTERRUPTS - 1)
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#define NR_VIRT_IRQS (MAX_VIRT_IRQ - MIN_VIRT_IRQ + 1)
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void
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virt_irq_init(void)
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{
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int i;
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for (i = 0; i < NR_IRQS; i++)
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virt_irq_to_real_map[i] = UNDEFINED_IRQ;
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}
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/* Create a mapping for a real_irq if it doesn't already exist.
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* Return the virtual irq as a convenience.
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*/
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int virt_irq_create_mapping(unsigned int real_irq)
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{
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unsigned int virq, first_virq;
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static int warned;
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if (ppc64_interrupt_controller == IC_OPEN_PIC)
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return real_irq; /* no mapping for openpic (for now) */
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if (ppc64_interrupt_controller == IC_CELL_PIC)
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return real_irq; /* no mapping for iic either */
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/* don't map interrupts < MIN_VIRT_IRQ */
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if (real_irq < MIN_VIRT_IRQ) {
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virt_irq_to_real_map[real_irq] = real_irq;
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return real_irq;
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}
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/* map to a number between MIN_VIRT_IRQ and MAX_VIRT_IRQ */
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virq = real_irq;
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if (virq > MAX_VIRT_IRQ)
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virq = (virq % NR_VIRT_IRQS) + MIN_VIRT_IRQ;
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/* search for this number or a free slot */
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first_virq = virq;
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while (virt_irq_to_real_map[virq] != UNDEFINED_IRQ) {
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if (virt_irq_to_real_map[virq] == real_irq)
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return virq;
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if (++virq > MAX_VIRT_IRQ)
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virq = MIN_VIRT_IRQ;
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if (virq == first_virq)
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goto nospace; /* oops, no free slots */
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}
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virt_irq_to_real_map[virq] = real_irq;
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return virq;
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nospace:
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if (!warned) {
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printk(KERN_CRIT "Interrupt table is full\n");
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printk(KERN_CRIT "Increase NR_IRQS (currently %d) "
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"in your kernel sources and rebuild.\n", NR_IRQS);
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warned = 1;
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}
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return NO_IRQ;
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}
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/*
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* In most cases will get a hit on the very first slot checked in the
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* virt_irq_to_real_map. Only when there are a large number of
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* IRQs will this be expensive.
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*/
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unsigned int real_irq_to_virt_slowpath(unsigned int real_irq)
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{
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unsigned int virq;
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unsigned int first_virq;
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virq = real_irq;
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if (virq > MAX_VIRT_IRQ)
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virq = (virq % NR_VIRT_IRQS) + MIN_VIRT_IRQ;
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first_virq = virq;
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do {
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if (virt_irq_to_real_map[virq] == real_irq)
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return virq;
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virq++;
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if (virq >= MAX_VIRT_IRQ)
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virq = 0;
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} while (first_virq != virq);
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return NO_IRQ;
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}
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#endif /* CONFIG_PPC64 */
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#ifdef CONFIG_IRQSTACKS
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struct thread_info *softirq_ctx[NR_CPUS];
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struct thread_info *hardirq_ctx[NR_CPUS];
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void irq_ctx_init(void)
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{
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struct thread_info *tp;
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int i;
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for_each_cpu(i) {
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memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
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tp = softirq_ctx[i];
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tp->cpu = i;
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tp->preempt_count = SOFTIRQ_OFFSET;
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memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
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tp = hardirq_ctx[i];
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tp->cpu = i;
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tp->preempt_count = HARDIRQ_OFFSET;
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}
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}
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static inline void do_softirq_onstack(void)
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{
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struct thread_info *curtp, *irqtp;
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curtp = current_thread_info();
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irqtp = softirq_ctx[smp_processor_id()];
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irqtp->task = curtp->task;
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call_do_softirq(irqtp);
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irqtp->task = NULL;
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}
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#else
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#define do_softirq_onstack() __do_softirq()
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#endif /* CONFIG_IRQSTACKS */
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void do_softirq(void)
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{
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unsigned long flags;
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if (in_interrupt())
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return;
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local_irq_save(flags);
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if (local_softirq_pending()) {
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account_system_vtime(current);
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local_bh_disable();
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do_softirq_onstack();
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account_system_vtime(current);
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__local_bh_enable();
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}
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(do_softirq);
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#ifdef CONFIG_PPC64
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static int __init setup_noirqdistrib(char *str)
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{
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distribute_irqs = 0;
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return 1;
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}
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__setup("noirqdistrib", setup_noirqdistrib);
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#endif /* CONFIG_PPC64 */
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