347 lines
8.3 KiB
C
347 lines
8.3 KiB
C
/*
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* MPC834x SYS board specific routines
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*
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* Maintainer: Kumar Gala <galak@kernel.crashing.org>
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*
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* Copyright 2005 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/reboot.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/major.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <linux/serial.h>
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#include <linux/tty.h> /* for linux/serial_core.h */
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#include <linux/serial_core.h>
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#include <linux/initrd.h>
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#include <linux/module.h>
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#include <linux/fsl_devices.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/atomic.h>
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#include <asm/time.h>
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#include <asm/io.h>
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#include <asm/machdep.h>
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#include <asm/ipic.h>
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#include <asm/bootinfo.h>
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#include <asm/pci-bridge.h>
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#include <asm/mpc83xx.h>
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#include <asm/irq.h>
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#include <asm/kgdb.h>
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#include <asm/ppc_sys.h>
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#include <mm/mmu_decl.h>
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#include <syslib/ppc83xx_setup.h>
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#ifndef CONFIG_PCI
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unsigned long isa_io_base = 0;
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unsigned long isa_mem_base = 0;
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#endif
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extern unsigned long total_memory; /* in mm/init */
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unsigned char __res[sizeof (bd_t)];
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#ifdef CONFIG_PCI
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int
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mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
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{
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static char pci_irq_table[][4] =
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/*
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* PCI IDSEL/INTPIN->INTLINE
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* A B C D
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*/
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{
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{PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */
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{PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */
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{PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x13 */
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{0, 0, 0, 0},
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{PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x15 */
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{PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x16 */
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{PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x17 */
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{PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x18 */
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{0, 0, 0, 0}, /* idsel 0x19 */
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{0, 0, 0, 0}, /* idsel 0x20 */
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};
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const long min_idsel = 0x11, max_idsel = 0x20, irqs_per_slot = 4;
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return PCI_IRQ_TABLE_LOOKUP;
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}
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int
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mpc83xx_exclude_device(u_char bus, u_char devfn)
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{
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return PCIBIOS_SUCCESSFUL;
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}
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#endif /* CONFIG_PCI */
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/* ************************************************************************
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*
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* Setup the architecture
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*
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*/
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static void __init
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mpc834x_sys_setup_arch(void)
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{
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bd_t *binfo = (bd_t *) __res;
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unsigned int freq;
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struct gianfar_platform_data *pdata;
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struct gianfar_mdio_data *mdata;
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/* get the core frequency */
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freq = binfo->bi_intfreq;
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/* Set loops_per_jiffy to a half-way reasonable value,
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for use until calibrate_delay gets called. */
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loops_per_jiffy = freq / HZ;
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#ifdef CONFIG_PCI
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/* setup PCI host bridges */
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mpc83xx_setup_hose();
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#endif
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mpc83xx_early_serial_map();
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/* setup the board related info for the MDIO bus */
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mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC83xx_MDIO);
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mdata->irq[0] = MPC83xx_IRQ_EXT1;
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mdata->irq[1] = MPC83xx_IRQ_EXT2;
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mdata->irq[2] = PHY_POLL;
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mdata->irq[31] = PHY_POLL;
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/* setup the board related information for the enet controllers */
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pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1);
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if (pdata) {
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pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
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pdata->bus_id = 0;
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pdata->phy_id = 0;
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memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
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}
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pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2);
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if (pdata) {
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pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
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pdata->bus_id = 0;
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pdata->phy_id = 1;
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memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
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}
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#ifdef CONFIG_BLK_DEV_INITRD
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if (initrd_start)
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ROOT_DEV = Root_RAM0;
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else
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#endif
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#ifdef CONFIG_ROOT_NFS
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ROOT_DEV = Root_NFS;
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#else
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ROOT_DEV = Root_HDA1;
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#endif
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}
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static void __init
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mpc834x_sys_map_io(void)
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{
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/* we steal the lowest ioremap addr for virt space */
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io_block_mapping(VIRT_IMMRBAR, immrbar, 1024*1024, _PAGE_IO);
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}
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int
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mpc834x_sys_show_cpuinfo(struct seq_file *m)
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{
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uint pvid, svid, phid1;
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bd_t *binfo = (bd_t *) __res;
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unsigned int freq;
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/* get the core frequency */
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freq = binfo->bi_intfreq;
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pvid = mfspr(SPRN_PVR);
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svid = mfspr(SPRN_SVR);
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seq_printf(m, "Vendor\t\t: Freescale Inc.\n");
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seq_printf(m, "Machine\t\t: mpc%s sys\n", cur_ppc_sys_spec->ppc_sys_name);
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seq_printf(m, "core clock\t: %d MHz\n"
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"bus clock\t: %d MHz\n",
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(int)(binfo->bi_intfreq / 1000000),
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(int)(binfo->bi_busfreq / 1000000));
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seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
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seq_printf(m, "SVR\t\t: 0x%x\n", svid);
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/* Display cpu Pll setting */
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phid1 = mfspr(SPRN_HID1);
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seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
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/* Display the amount of memory */
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seq_printf(m, "Memory\t\t: %d MB\n", (int)(binfo->bi_memsize / (1024 * 1024)));
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return 0;
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}
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void __init
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mpc834x_sys_init_IRQ(void)
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{
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bd_t *binfo = (bd_t *) __res;
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u8 senses[8] = {
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0, /* EXT 0 */
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IRQ_SENSE_LEVEL, /* EXT 1 */
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IRQ_SENSE_LEVEL, /* EXT 2 */
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0, /* EXT 3 */
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#ifdef CONFIG_PCI
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IRQ_SENSE_LEVEL, /* EXT 4 */
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IRQ_SENSE_LEVEL, /* EXT 5 */
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IRQ_SENSE_LEVEL, /* EXT 6 */
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IRQ_SENSE_LEVEL, /* EXT 7 */
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#else
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0, /* EXT 4 */
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0, /* EXT 5 */
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0, /* EXT 6 */
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0, /* EXT 7 */
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#endif
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};
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ipic_init(binfo->bi_immr_base + 0x00700, 0, MPC83xx_IPIC_IRQ_OFFSET, senses, 8);
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/* Initialize the default interrupt mapping priorities,
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* in case the boot rom changed something on us.
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*/
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ipic_set_default_priority();
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}
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#if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
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extern ulong ds1374_get_rtc_time(void);
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extern int ds1374_set_rtc_time(ulong);
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static int __init
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mpc834x_rtc_hookup(void)
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{
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struct timespec tv;
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ppc_md.get_rtc_time = ds1374_get_rtc_time;
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ppc_md.set_rtc_time = ds1374_set_rtc_time;
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tv.tv_nsec = 0;
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tv.tv_sec = (ppc_md.get_rtc_time)();
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do_settimeofday(&tv);
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return 0;
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}
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late_initcall(mpc834x_rtc_hookup);
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#endif
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static __inline__ void
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mpc834x_sys_set_bat(void)
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{
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/* we steal the lowest ioremap addr for virt space */
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mb();
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mtspr(SPRN_DBAT1U, VIRT_IMMRBAR | 0x1e);
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mtspr(SPRN_DBAT1L, immrbar | 0x2a);
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mb();
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}
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void __init
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platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
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unsigned long r6, unsigned long r7)
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{
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bd_t *binfo = (bd_t *) __res;
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/* parse_bootinfo must always be called first */
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parse_bootinfo(find_bootinfo());
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/*
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* If we were passed in a board information, copy it into the
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* residual data area.
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*/
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if (r3) {
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memcpy((void *) __res, (void *) (r3 + KERNELBASE),
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sizeof (bd_t));
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}
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#if defined(CONFIG_BLK_DEV_INITRD)
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/*
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* If the init RAM disk has been configured in, and there's a valid
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* starting address for it, set it up.
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*/
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if (r4) {
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initrd_start = r4 + KERNELBASE;
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initrd_end = r5 + KERNELBASE;
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}
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#endif /* CONFIG_BLK_DEV_INITRD */
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/* Copy the kernel command line arguments to a safe place. */
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if (r6) {
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*(char *) (r7 + KERNELBASE) = 0;
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strcpy(cmd_line, (char *) (r6 + KERNELBASE));
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}
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immrbar = binfo->bi_immr_base;
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mpc834x_sys_set_bat();
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#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
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{
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struct uart_port p;
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memset(&p, 0, sizeof (p));
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p.iotype = UPIO_MEM;
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p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4500);
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p.uartclk = binfo->bi_busfreq;
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gen550_init(0, &p);
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memset(&p, 0, sizeof (p));
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p.iotype = UPIO_MEM;
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p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4600);
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p.uartclk = binfo->bi_busfreq;
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gen550_init(1, &p);
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}
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#endif
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identify_ppc_sys_by_id(mfspr(SPRN_SVR));
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/* setup the PowerPC module struct */
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ppc_md.setup_arch = mpc834x_sys_setup_arch;
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ppc_md.show_cpuinfo = mpc834x_sys_show_cpuinfo;
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ppc_md.init_IRQ = mpc834x_sys_init_IRQ;
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ppc_md.get_irq = ipic_get_irq;
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ppc_md.restart = mpc83xx_restart;
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ppc_md.power_off = mpc83xx_power_off;
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ppc_md.halt = mpc83xx_halt;
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ppc_md.find_end_of_memory = mpc83xx_find_end_of_memory;
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ppc_md.setup_io_mappings = mpc834x_sys_map_io;
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ppc_md.time_init = mpc83xx_time_init;
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ppc_md.set_rtc_time = NULL;
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ppc_md.get_rtc_time = NULL;
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ppc_md.calibrate_decr = mpc83xx_calibrate_decr;
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ppc_md.early_serial_map = mpc83xx_early_serial_map;
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#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
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ppc_md.progress = gen550_progress;
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#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
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if (ppc_md.progress)
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ppc_md.progress("mpc834x_sys_init(): exit", 0);
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return;
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}
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