original_kernel/arch/mips/mm
Ralf Baechle 65f1f5a2c3 Don't copy SB1 cache error handler to uncached memory.
This may have made sense on a paranoid day with pass 1 BCM1250 processors
that were throwing cache error exception left and right for no good
reason.  On modern silicion that hardly makes sense and the code had
gotten just an obscurity ...
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:34 +01:00
..
Makefile Use R4000 TLB routines for SB1 also. 2005-10-29 19:32:31 +01:00
c-r3k.c Cleanup the mess in cpu_cache_init. 2005-10-29 19:32:32 +01:00
c-r4k.c Cleanup the mess in cpu_cache_init. 2005-10-29 19:32:32 +01:00
c-sb1.c Don't copy SB1 cache error handler to uncached memory. 2005-10-29 19:32:34 +01:00
c-tx39.c Cleanup the mess in cpu_cache_init. 2005-10-29 19:32:32 +01:00
cache.c Cleanup the mess in cpu_cache_init. 2005-10-29 19:32:32 +01:00
cerr-sb1.c
cex-gen.S
cex-sb1.S
dma-coherent.c
dma-ip27.c
dma-ip32.c
dma-noncoherent.c Don't set up a sg dma address if we have no page address for some reason. 2005-10-29 19:32:17 +01:00
extable.c
fault.c
highmem.c Define kmap_atomic_pfn() for MIPS. 2005-10-29 19:31:42 +01:00
init.c
ioremap.c
pg-r4k.c Add/Fix missing bit of R4600 hit cacheop workaround. 2005-10-29 19:32:18 +01:00
pg-sb1.c
pgtable-32.c
pgtable-64.c
pgtable.c
sc-ip22.c
sc-r5k.c
sc-rm7k.c
tlb-andes.c
tlb-r3k.c
tlb-r4k.c
tlb-r8k.c
tlbex-fault.S
tlbex.c R4600 v2.0 needs a nop before tlbp. 2005-10-29 19:32:17 +01:00