original_kernel/arch/ppc/kernel
Stefan Roese f4151b9ba8 [POWERPC] 4xx: Fix TLB 0 problem with CONFIG_SERIAL_TEXT_DEBUG
Right now TLB entry 0 ist used as UART0 mapping for the early debug
output (via CONFIG_SERIAL_TEXT_DEBUG). This causes problems when many
TLB's get used upon Linux bootup (e.g. while PCIe scanning behind
bridges and/or switches on 440SPe platforms). This will overwrite the
TLB 0 entry and further debug output's may crash/hang the system.

This patch moves the early debug UART0 TLB entry from 0 to 62 as done
in arch/powerpc. This way it is in the "pinned" area and will not get
overwritten. Also the arch/ppc/mm/44x_mmu.c code is now synced with the
newer code from arch/powerpc.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:31:16 -06:00
..
Makefile
asm-offsets.c
cpu_setup_power4.S
entry.S
head.S
head_4xx.S
head_8xx.S
head_44x.S
head_booke.h
head_fsl_booke.S
machine_kexec.c
misc.S
pci.c
ppc-stub.c
ppc_htab.c
ppc_ksyms.c
relocate_kernel.S
rio.c
semaphore.c
setup.c
smp-tbsync.c
smp.c
softemu8xx.c
time.c
traps.c
vmlinux.lds.S