305 lines
7.5 KiB
C
305 lines
7.5 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#ifndef _ASM_TILE_IO_H
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#define _ASM_TILE_IO_H
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#include <linux/kernel.h>
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#include <linux/bug.h>
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#include <asm/page.h>
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#define IO_SPACE_LIMIT 0xfffffffful
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/*
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem
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* access.
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*/
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#define xlate_dev_mem_ptr(p) __va(p)
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/*
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* Convert a virtual cached pointer to an uncached pointer.
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*/
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#define xlate_dev_kmem_ptr(p) p
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/*
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* Change "struct page" to physical address.
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*/
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#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
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/*
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* Some places try to pass in an loff_t for PHYSADDR (?!), so we cast it to
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* long before casting it to a pointer to avoid compiler warnings.
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*/
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#if CHIP_HAS_MMIO()
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extern void __iomem *ioremap(resource_size_t offset, unsigned long size);
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extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
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pgprot_t pgprot);
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extern void iounmap(volatile void __iomem *addr);
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#else
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#define ioremap(physaddr, size) ((void __iomem *)(unsigned long)(physaddr))
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#define iounmap(addr) ((void)0)
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#endif
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#define ioremap_nocache(physaddr, size) ioremap(physaddr, size)
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#define ioremap_wc(physaddr, size) ioremap(physaddr, size)
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#define ioremap_writethrough(physaddr, size) ioremap(physaddr, size)
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#define ioremap_fullcache(physaddr, size) ioremap(physaddr, size)
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#define mmiowb()
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/* Conversion between virtual and physical mappings. */
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#define mm_ptov(addr) ((void *)phys_to_virt(addr))
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#define mm_vtop(addr) ((unsigned long)virt_to_phys(addr))
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#ifdef CONFIG_PCI
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extern u8 _tile_readb(unsigned long addr);
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extern u16 _tile_readw(unsigned long addr);
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extern u32 _tile_readl(unsigned long addr);
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extern u64 _tile_readq(unsigned long addr);
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extern void _tile_writeb(u8 val, unsigned long addr);
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extern void _tile_writew(u16 val, unsigned long addr);
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extern void _tile_writel(u32 val, unsigned long addr);
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extern void _tile_writeq(u64 val, unsigned long addr);
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#else
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/*
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* The Tile architecture does not support IOMEM unless PCI is enabled.
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* Unfortunately we can't yet simply not declare these methods,
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* since some generic code that compiles into the kernel, but
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* we never run, uses them unconditionally.
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*/
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static inline int iomem_panic(void)
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{
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panic("readb/writeb and friends do not exist on tile without PCI");
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return 0;
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}
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static inline u8 _tile_readb(unsigned long addr)
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{
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return iomem_panic();
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}
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static inline u16 _tile_readw(unsigned long addr)
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{
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return iomem_panic();
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}
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static inline u32 _tile_readl(unsigned long addr)
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{
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return iomem_panic();
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}
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static inline u64 _tile_readq(unsigned long addr)
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{
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return iomem_panic();
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}
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static inline void _tile_writeb(u8 val, unsigned long addr)
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{
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iomem_panic();
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}
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static inline void _tile_writew(u16 val, unsigned long addr)
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{
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iomem_panic();
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}
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static inline void _tile_writel(u32 val, unsigned long addr)
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{
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iomem_panic();
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}
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static inline void _tile_writeq(u64 val, unsigned long addr)
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{
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iomem_panic();
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}
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#endif
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#define readb(addr) _tile_readb((unsigned long)addr)
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#define readw(addr) _tile_readw((unsigned long)addr)
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#define readl(addr) _tile_readl((unsigned long)addr)
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#define readq(addr) _tile_readq((unsigned long)addr)
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#define writeb(val, addr) _tile_writeb(val, (unsigned long)addr)
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#define writew(val, addr) _tile_writew(val, (unsigned long)addr)
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#define writel(val, addr) _tile_writel(val, (unsigned long)addr)
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#define writeq(val, addr) _tile_writeq(val, (unsigned long)addr)
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#define __raw_readb readb
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#define __raw_readw readw
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#define __raw_readl readl
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#define __raw_readq readq
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#define __raw_writeb writeb
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#define __raw_writew writew
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#define __raw_writel writel
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#define __raw_writeq writeq
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#define readb_relaxed readb
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#define readw_relaxed readw
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#define readl_relaxed readl
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#define readq_relaxed readq
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#define ioread8 readb
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#define ioread16 readw
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#define ioread32 readl
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#define ioread64 readq
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#define iowrite8 writeb
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#define iowrite16 writew
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#define iowrite32 writel
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#define iowrite64 writeq
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static inline void memset_io(void *dst, int val, size_t len)
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{
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int x;
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BUG_ON((unsigned long)dst & 0x3);
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val = (val & 0xff) * 0x01010101;
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for (x = 0; x < len; x += 4)
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writel(val, dst + x);
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}
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static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,
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size_t len)
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{
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int x;
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BUG_ON((unsigned long)src & 0x3);
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for (x = 0; x < len; x += 4)
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*(u32 *)(dst + x) = readl(src + x);
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}
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static inline void memcpy_toio(volatile void __iomem *dst, const void *src,
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size_t len)
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{
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int x;
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BUG_ON((unsigned long)dst & 0x3);
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for (x = 0; x < len; x += 4)
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writel(*(u32 *)(src + x), dst + x);
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}
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/*
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* The Tile architecture does not support IOPORT, even with PCI.
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* Unfortunately we can't yet simply not declare these methods,
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* since some generic code that compiles into the kernel, but
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* we never run, uses them unconditionally.
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*/
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static inline long ioport_panic(void)
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{
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panic("inb/outb and friends do not exist on tile");
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return 0;
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}
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static inline void __iomem *ioport_map(unsigned long port, unsigned int len)
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{
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return (void __iomem *) ioport_panic();
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}
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static inline void ioport_unmap(void __iomem *addr)
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{
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ioport_panic();
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}
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static inline u8 inb(unsigned long addr)
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{
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return ioport_panic();
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}
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static inline u16 inw(unsigned long addr)
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{
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return ioport_panic();
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}
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static inline u32 inl(unsigned long addr)
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{
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return ioport_panic();
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}
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static inline void outb(u8 b, unsigned long addr)
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{
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ioport_panic();
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}
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static inline void outw(u16 b, unsigned long addr)
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{
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ioport_panic();
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}
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static inline void outl(u32 b, unsigned long addr)
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{
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ioport_panic();
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}
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#define inb_p(addr) inb(addr)
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#define inw_p(addr) inw(addr)
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#define inl_p(addr) inl(addr)
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#define outb_p(x, addr) outb((x), (addr))
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#define outw_p(x, addr) outw((x), (addr))
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#define outl_p(x, addr) outl((x), (addr))
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static inline void insb(unsigned long addr, void *buffer, int count)
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{
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ioport_panic();
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}
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static inline void insw(unsigned long addr, void *buffer, int count)
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{
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ioport_panic();
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}
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static inline void insl(unsigned long addr, void *buffer, int count)
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{
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ioport_panic();
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}
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static inline void outsb(unsigned long addr, const void *buffer, int count)
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{
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ioport_panic();
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}
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static inline void outsw(unsigned long addr, const void *buffer, int count)
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{
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ioport_panic();
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}
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static inline void outsl(unsigned long addr, const void *buffer, int count)
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{
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ioport_panic();
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}
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#define ioread16be(addr) be16_to_cpu(ioread16(addr))
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#define ioread32be(addr) be32_to_cpu(ioread32(addr))
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#define iowrite16be(v, addr) iowrite16(be16_to_cpu(v), (addr))
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#define iowrite32be(v, addr) iowrite32(be32_to_cpu(v), (addr))
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#define ioread8_rep(p, dst, count) \
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insb((unsigned long) (p), (dst), (count))
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#define ioread16_rep(p, dst, count) \
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insw((unsigned long) (p), (dst), (count))
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#define ioread32_rep(p, dst, count) \
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insl((unsigned long) (p), (dst), (count))
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#define iowrite8_rep(p, src, count) \
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outsb((unsigned long) (p), (src), (count))
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#define iowrite16_rep(p, src, count) \
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outsw((unsigned long) (p), (src), (count))
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#define iowrite32_rep(p, src, count) \
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outsl((unsigned long) (p), (src), (count))
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#define virt_to_bus virt_to_phys
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#define bus_to_virt phys_to_virt
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#endif /* _ASM_TILE_IO_H */
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