313 lines
8.1 KiB
Plaintext
313 lines
8.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for AM6 SoC Family Main Domain peripherals
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*
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* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
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*/
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&cbass_main {
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msmc_ram: sram@70000000 {
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compatible = "mmio-sram";
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reg = <0x0 0x70000000 0x0 0x200000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x70000000 0x200000>;
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atf-sram@0 {
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reg = <0x0 0x20000>;
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};
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sysfw-sram@f0000 {
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reg = <0xf0000 0x10000>;
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};
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l3cache-sram@100000 {
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reg = <0x100000 0x100000>;
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};
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};
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gic500: interrupt-controller@1800000 {
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compatible = "arm,gic-v3";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
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<0x00 0x01880000 0x00 0x90000>; /* GICR */
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/*
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* vcpumntirq:
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* virtual CPU interface maintenance interrupt
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*/
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interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
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gic_its: gic-its@18200000 {
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compatible = "arm,gic-v3-its";
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reg = <0x00 0x01820000 0x00 0x10000>;
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msi-controller;
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#msi-cells = <1>;
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};
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};
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secure_proxy_main: mailbox@32c00000 {
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compatible = "ti,am654-secure-proxy";
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#mbox-cells = <1>;
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reg-names = "target_data", "rt", "scfg";
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reg = <0x00 0x32c00000 0x00 0x100000>,
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<0x00 0x32400000 0x00 0x100000>,
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<0x00 0x32800000 0x00 0x100000>;
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interrupt-names = "rx_011";
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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};
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main_uart0: serial@2800000 {
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compatible = "ti,am654-uart";
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reg = <0x00 0x02800000 0x00 0x100>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <48000000>;
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current-speed = <115200>;
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power-domains = <&k3_pds 146>;
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};
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main_uart1: serial@2810000 {
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compatible = "ti,am654-uart";
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reg = <0x00 0x02810000 0x00 0x100>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <48000000>;
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power-domains = <&k3_pds 147>;
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};
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main_uart2: serial@2820000 {
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compatible = "ti,am654-uart";
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reg = <0x00 0x02820000 0x00 0x100>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <48000000>;
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power-domains = <&k3_pds 148>;
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};
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main_pmx0: pinmux@11c000 {
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compatible = "pinctrl-single";
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reg = <0x0 0x11c000 0x0 0x2e4>;
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#pinctrl-cells = <1>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0xffffffff>;
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};
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main_pmx1: pinmux@11c2e8 {
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compatible = "pinctrl-single";
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reg = <0x0 0x11c2e8 0x0 0x24>;
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#pinctrl-cells = <1>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0xffffffff>;
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};
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main_i2c0: i2c@2000000 {
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compatible = "ti,am654-i2c", "ti,omap4-i2c";
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reg = <0x0 0x2000000 0x0 0x100>;
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interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-names = "fck";
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clocks = <&k3_clks 110 1>;
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power-domains = <&k3_pds 110>;
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};
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main_i2c1: i2c@2010000 {
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compatible = "ti,am654-i2c", "ti,omap4-i2c";
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reg = <0x0 0x2010000 0x0 0x100>;
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interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-names = "fck";
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clocks = <&k3_clks 111 1>;
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power-domains = <&k3_pds 111>;
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};
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main_i2c2: i2c@2020000 {
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compatible = "ti,am654-i2c", "ti,omap4-i2c";
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reg = <0x0 0x2020000 0x0 0x100>;
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interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-names = "fck";
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clocks = <&k3_clks 112 1>;
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power-domains = <&k3_pds 112>;
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};
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main_i2c3: i2c@2030000 {
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compatible = "ti,am654-i2c", "ti,omap4-i2c";
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reg = <0x0 0x2030000 0x0 0x100>;
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interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-names = "fck";
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clocks = <&k3_clks 113 1>;
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power-domains = <&k3_pds 113>;
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};
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ecap0: pwm@3100000 {
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compatible = "ti,am654-ecap", "ti,am3352-ecap";
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#pwm-cells = <3>;
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reg = <0x0 0x03100000 0x0 0x60>;
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power-domains = <&k3_pds 39>;
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clocks = <&k3_clks 39 0>;
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clock-names = "fck";
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};
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main_spi0: spi@2100000 {
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compatible = "ti,am654-mcspi","ti,omap4-mcspi";
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reg = <0x0 0x2100000 0x0 0x400>;
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interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&k3_clks 137 1>;
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power-domains = <&k3_pds 137>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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main_spi1: spi@2110000 {
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compatible = "ti,am654-mcspi","ti,omap4-mcspi";
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reg = <0x0 0x2110000 0x0 0x400>;
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interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&k3_clks 138 1>;
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power-domains = <&k3_pds 138>;
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#address-cells = <1>;
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#size-cells = <0>;
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assigned-clocks = <&k3_clks 137 1>;
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assigned-clock-rates = <48000000>;
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};
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main_spi2: spi@2120000 {
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compatible = "ti,am654-mcspi","ti,omap4-mcspi";
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reg = <0x0 0x2120000 0x0 0x400>;
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interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&k3_clks 139 1>;
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power-domains = <&k3_pds 139>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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main_spi3: spi@2130000 {
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compatible = "ti,am654-mcspi","ti,omap4-mcspi";
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reg = <0x0 0x2130000 0x0 0x400>;
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interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&k3_clks 140 1>;
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power-domains = <&k3_pds 140>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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main_spi4: spi@2140000 {
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compatible = "ti,am654-mcspi","ti,omap4-mcspi";
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reg = <0x0 0x2140000 0x0 0x400>;
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interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&k3_clks 141 1>;
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power-domains = <&k3_pds 141>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sdhci0: sdhci@4f80000 {
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compatible = "ti,am654-sdhci-5.1";
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reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>;
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power-domains = <&k3_pds 47>;
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clocks = <&k3_clks 47 0>, <&k3_clks 47 1>;
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clock-names = "clk_ahb", "clk_xin";
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interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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ti,otap-del-sel = <0x2>;
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ti,trm-icp = <0x8>;
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dma-coherent;
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};
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scm_conf: scm_conf@100000 {
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compatible = "syscon", "simple-mfd";
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reg = <0 0x00100000 0 0x1c000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x00100000 0x1c000>;
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};
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dwc3_0: dwc3@4000000 {
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compatible = "ti,am654-dwc3";
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reg = <0x0 0x4000000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x4000000 0x20000>;
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interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
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dma-coherent;
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power-domains = <&k3_pds 151>;
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assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
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assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
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<&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */
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usb0: usb@10000 {
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compatible = "snps,dwc3";
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reg = <0x10000 0x10000>;
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interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "peripheral",
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"host",
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"otg";
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maximum-speed = "high-speed";
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dr_mode = "otg";
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phys = <&usb0_phy>;
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phy-names = "usb2-phy";
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snps,dis_u3_susphy_quirk;
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};
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};
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usb0_phy: phy@4100000 {
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compatible = "ti,am654-usb2", "ti,omap-usb2";
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reg = <0x0 0x4100000 0x0 0x54>;
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syscon-phy-power = <&scm_conf 0x4000>;
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clocks = <&k3_clks 151 0>, <&k3_clks 151 1>;
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clock-names = "wkupclk", "refclk";
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#phy-cells = <0>;
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};
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dwc3_1: dwc3@4020000 {
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compatible = "ti,am654-dwc3";
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reg = <0x0 0x4020000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x4020000 0x20000>;
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interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
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dma-coherent;
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power-domains = <&k3_pds 152>;
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assigned-clocks = <&k3_clks 152 2>;
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assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
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usb1: usb@10000 {
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compatible = "snps,dwc3";
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reg = <0x10000 0x10000>;
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interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "peripheral",
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"host",
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"otg";
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maximum-speed = "high-speed";
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dr_mode = "otg";
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phys = <&usb1_phy>;
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phy-names = "usb2-phy";
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};
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};
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usb1_phy: phy@4110000 {
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compatible = "ti,am654-usb2", "ti,omap-usb2";
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reg = <0x0 0x4110000 0x0 0x54>;
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syscon-phy-power = <&scm_conf 0x4020>;
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clocks = <&k3_clks 152 0>, <&k3_clks 152 1>;
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clock-names = "wkupclk", "refclk";
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#phy-cells = <0>;
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};
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};
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