330 lines
8.4 KiB
C
330 lines
8.4 KiB
C
/*
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* Atmel SAMA5D2-Compatible Shutdown Controller (SHDWC) driver.
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* Found on some SoCs as the sama5d2 (obviously).
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*
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* Copyright (C) 2015 Atmel Corporation,
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* Nicolas Ferre <nicolas.ferre@atmel.com>
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*
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* Evolved from driver at91-poweroff.c.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* TODO:
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* - addition to status of other wake-up inputs [1 - 15]
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* - Analog Comparator wake-up alarm
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* - Serial RX wake-up alarm
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* - low power debouncer
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/printk.h>
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#include <soc/at91/at91sam9_ddrsdr.h>
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#define SLOW_CLOCK_FREQ 32768
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#define AT91_SHDW_CR 0x00 /* Shut Down Control Register */
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#define AT91_SHDW_SHDW BIT(0) /* Shut Down command */
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#define AT91_SHDW_KEY (0xa5UL << 24) /* KEY Password */
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#define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */
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#define AT91_SHDW_WKUPDBC_SHIFT 24
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#define AT91_SHDW_WKUPDBC_MASK GENMASK(31, 16)
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#define AT91_SHDW_WKUPDBC(x) (((x) << AT91_SHDW_WKUPDBC_SHIFT) \
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& AT91_SHDW_WKUPDBC_MASK)
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#define AT91_SHDW_SR 0x08 /* Shut Down Status Register */
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#define AT91_SHDW_WKUPIS_SHIFT 16
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#define AT91_SHDW_WKUPIS_MASK GENMASK(31, 16)
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#define AT91_SHDW_WKUPIS(x) ((1 << (x)) << AT91_SHDW_WKUPIS_SHIFT \
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& AT91_SHDW_WKUPIS_MASK)
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#define AT91_SHDW_WUIR 0x0c /* Shutdown Wake-up Inputs Register */
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#define AT91_SHDW_WKUPEN_MASK GENMASK(15, 0)
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#define AT91_SHDW_WKUPEN(x) ((1 << (x)) & AT91_SHDW_WKUPEN_MASK)
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#define AT91_SHDW_WKUPT_SHIFT 16
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#define AT91_SHDW_WKUPT_MASK GENMASK(31, 16)
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#define AT91_SHDW_WKUPT(x) ((1 << (x)) << AT91_SHDW_WKUPT_SHIFT \
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& AT91_SHDW_WKUPT_MASK)
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#define SHDW_WK_PIN(reg, cfg) ((reg) & AT91_SHDW_WKUPIS((cfg)->wkup_pin_input))
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#define SHDW_RTCWK(reg, cfg) (((reg) >> ((cfg)->sr_rtcwk_shift)) & 0x1)
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#define SHDW_RTCWKEN(cfg) (1 << ((cfg)->mr_rtcwk_shift))
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#define DBC_PERIOD_US(x) DIV_ROUND_UP_ULL((1000000 * (x)), \
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SLOW_CLOCK_FREQ)
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struct shdwc_config {
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u8 wkup_pin_input;
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u8 mr_rtcwk_shift;
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u8 sr_rtcwk_shift;
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};
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struct shdwc {
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struct shdwc_config *cfg;
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void __iomem *at91_shdwc_base;
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};
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/*
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* Hold configuration here, cannot be more than one instance of the driver
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* since pm_power_off itself is global.
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*/
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static struct shdwc *at91_shdwc;
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static struct clk *sclk;
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static void __iomem *mpddrc_base;
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static const unsigned long long sdwc_dbc_period[] = {
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0, 3, 32, 512, 4096, 32768,
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};
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static void __init at91_wakeup_status(struct platform_device *pdev)
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{
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struct shdwc *shdw = platform_get_drvdata(pdev);
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u32 reg;
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char *reason = "unknown";
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reg = readl(shdw->at91_shdwc_base + AT91_SHDW_SR);
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dev_dbg(&pdev->dev, "%s: status = %#x\n", __func__, reg);
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/* Simple power-on, just bail out */
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if (!reg)
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return;
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if (SHDW_WK_PIN(reg, shdw->cfg))
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reason = "WKUP pin";
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else if (SHDW_RTCWK(reg, shdw->cfg))
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reason = "RTC";
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pr_info("AT91: Wake-Up source: %s\n", reason);
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}
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static void at91_poweroff(void)
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{
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writel(AT91_SHDW_KEY | AT91_SHDW_SHDW,
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at91_shdwc->at91_shdwc_base + AT91_SHDW_CR);
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}
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static void at91_lpddr_poweroff(void)
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{
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asm volatile(
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/* Align to cache lines */
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".balign 32\n\t"
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/* Ensure AT91_SHDW_CR is in the TLB by reading it */
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" ldr r6, [%2, #" __stringify(AT91_SHDW_CR) "]\n\t"
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/* Power down SDRAM0 */
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" str %1, [%0, #" __stringify(AT91_DDRSDRC_LPR) "]\n\t"
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/* Shutdown CPU */
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" str %3, [%2, #" __stringify(AT91_SHDW_CR) "]\n\t"
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" b .\n\t"
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:
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: "r" (mpddrc_base),
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"r" cpu_to_le32(AT91_DDRSDRC_LPDDR2_PWOFF),
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"r" (at91_shdwc->at91_shdwc_base),
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"r" cpu_to_le32(AT91_SHDW_KEY | AT91_SHDW_SHDW)
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: "r0");
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}
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static u32 at91_shdwc_debouncer_value(struct platform_device *pdev,
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u32 in_period_us)
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{
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int i;
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int max_idx = ARRAY_SIZE(sdwc_dbc_period) - 1;
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unsigned long long period_us;
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unsigned long long max_period_us = DBC_PERIOD_US(sdwc_dbc_period[max_idx]);
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if (in_period_us > max_period_us) {
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dev_warn(&pdev->dev,
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"debouncer period %u too big, reduced to %llu us\n",
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in_period_us, max_period_us);
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return max_idx;
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}
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for (i = max_idx - 1; i > 0; i--) {
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period_us = DBC_PERIOD_US(sdwc_dbc_period[i]);
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dev_dbg(&pdev->dev, "%s: ref[%d] = %llu\n",
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__func__, i, period_us);
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if (in_period_us > period_us)
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break;
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}
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return i + 1;
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}
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static u32 at91_shdwc_get_wakeup_input(struct platform_device *pdev,
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struct device_node *np)
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{
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struct device_node *cnp;
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u32 wk_input_mask;
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u32 wuir = 0;
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u32 wk_input;
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for_each_child_of_node(np, cnp) {
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if (of_property_read_u32(cnp, "reg", &wk_input)) {
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dev_warn(&pdev->dev, "reg property is missing for %s\n",
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cnp->full_name);
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continue;
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}
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wk_input_mask = 1 << wk_input;
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if (!(wk_input_mask & AT91_SHDW_WKUPEN_MASK)) {
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dev_warn(&pdev->dev,
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"wake-up input %d out of bounds ignore\n",
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wk_input);
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continue;
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}
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wuir |= wk_input_mask;
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if (of_property_read_bool(cnp, "atmel,wakeup-active-high"))
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wuir |= AT91_SHDW_WKUPT(wk_input);
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dev_dbg(&pdev->dev, "%s: (child %d) wuir = %#x\n",
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__func__, wk_input, wuir);
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}
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return wuir;
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}
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static void at91_shdwc_dt_configure(struct platform_device *pdev)
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{
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struct shdwc *shdw = platform_get_drvdata(pdev);
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struct device_node *np = pdev->dev.of_node;
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u32 mode = 0, tmp, input;
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if (!np) {
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dev_err(&pdev->dev, "device node not found\n");
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return;
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}
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if (!of_property_read_u32(np, "debounce-delay-us", &tmp))
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mode |= AT91_SHDW_WKUPDBC(at91_shdwc_debouncer_value(pdev, tmp));
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if (of_property_read_bool(np, "atmel,wakeup-rtc-timer"))
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mode |= SHDW_RTCWKEN(shdw->cfg);
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dev_dbg(&pdev->dev, "%s: mode = %#x\n", __func__, mode);
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writel(mode, shdw->at91_shdwc_base + AT91_SHDW_MR);
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input = at91_shdwc_get_wakeup_input(pdev, np);
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writel(input, shdw->at91_shdwc_base + AT91_SHDW_WUIR);
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}
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static const struct shdwc_config sama5d2_shdwc_config = {
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.wkup_pin_input = 0,
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.mr_rtcwk_shift = 17,
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.sr_rtcwk_shift = 5,
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};
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static const struct of_device_id at91_shdwc_of_match[] = {
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{
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.compatible = "atmel,sama5d2-shdwc",
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.data = &sama5d2_shdwc_config,
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}, {
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/*sentinel*/
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}
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};
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MODULE_DEVICE_TABLE(of, at91_shdwc_of_match);
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static int __init at91_shdwc_probe(struct platform_device *pdev)
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{
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struct resource *res;
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const struct of_device_id *match;
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struct device_node *np;
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u32 ddr_type;
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int ret;
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if (!pdev->dev.of_node)
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return -ENODEV;
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at91_shdwc = devm_kzalloc(&pdev->dev, sizeof(*at91_shdwc), GFP_KERNEL);
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if (!at91_shdwc)
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return -ENOMEM;
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platform_set_drvdata(pdev, at91_shdwc);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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at91_shdwc->at91_shdwc_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(at91_shdwc->at91_shdwc_base)) {
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dev_err(&pdev->dev, "Could not map reset controller address\n");
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return PTR_ERR(at91_shdwc->at91_shdwc_base);
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}
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match = of_match_node(at91_shdwc_of_match, pdev->dev.of_node);
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at91_shdwc->cfg = (struct shdwc_config *)(match->data);
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sclk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(sclk))
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return PTR_ERR(sclk);
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ret = clk_prepare_enable(sclk);
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if (ret) {
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dev_err(&pdev->dev, "Could not enable slow clock\n");
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return ret;
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}
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at91_wakeup_status(pdev);
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at91_shdwc_dt_configure(pdev);
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pm_power_off = at91_poweroff;
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np = of_find_compatible_node(NULL, NULL, "atmel,sama5d3-ddramc");
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if (!np)
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return 0;
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mpddrc_base = of_iomap(np, 0);
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of_node_put(np);
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if (!mpddrc_base)
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return 0;
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ddr_type = readl(mpddrc_base + AT91_DDRSDRC_MDR) & AT91_DDRSDRC_MD;
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if ((ddr_type == AT91_DDRSDRC_MD_LPDDR2) ||
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(ddr_type == AT91_DDRSDRC_MD_LPDDR3))
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pm_power_off = at91_lpddr_poweroff;
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else
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iounmap(mpddrc_base);
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return 0;
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}
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static int __exit at91_shdwc_remove(struct platform_device *pdev)
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{
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struct shdwc *shdw = platform_get_drvdata(pdev);
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if (pm_power_off == at91_poweroff ||
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pm_power_off == at91_lpddr_poweroff)
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pm_power_off = NULL;
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/* Reset values to disable wake-up features */
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writel(0, shdw->at91_shdwc_base + AT91_SHDW_MR);
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writel(0, shdw->at91_shdwc_base + AT91_SHDW_WUIR);
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clk_disable_unprepare(sclk);
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return 0;
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}
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static struct platform_driver at91_shdwc_driver = {
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.remove = __exit_p(at91_shdwc_remove),
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.driver = {
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.name = "at91-shdwc",
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.of_match_table = at91_shdwc_of_match,
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},
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};
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module_platform_driver_probe(at91_shdwc_driver, at91_shdwc_probe);
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MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
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MODULE_DESCRIPTION("Atmel shutdown controller driver");
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MODULE_LICENSE("GPL v2");
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