153 lines
3.5 KiB
C
153 lines
3.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _S390_TLBFLUSH_H
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#define _S390_TLBFLUSH_H
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <asm/processor.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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/*
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* Flush all TLB entries on the local CPU.
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*/
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static inline void __tlb_flush_local(void)
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{
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asm volatile("ptlb" : : : "memory");
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}
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/*
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* Flush TLB entries for a specific ASCE on all CPUs
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*/
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static inline void __tlb_flush_idte(unsigned long asce)
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{
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unsigned long opt;
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opt = IDTE_PTOA;
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if (MACHINE_HAS_TLB_GUEST)
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opt |= IDTE_GUEST_ASCE;
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/* Global TLB flush for the mm */
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asm volatile(
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" .insn rrf,0xb98e0000,0,%0,%1,0"
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: : "a" (opt), "a" (asce) : "cc");
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}
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#ifdef CONFIG_SMP
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void smp_ptlb_all(void);
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/*
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* Flush all TLB entries on all CPUs.
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*/
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static inline void __tlb_flush_global(void)
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{
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unsigned int dummy = 0;
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csp(&dummy, 0, 0);
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}
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/*
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* Flush TLB entries for a specific mm on all CPUs (in case gmap is used
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* this implicates multiple ASCEs!).
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*/
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static inline void __tlb_flush_mm(struct mm_struct *mm)
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{
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unsigned long gmap_asce;
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/*
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* If the machine has IDTE we prefer to do a per mm flush
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* on all cpus instead of doing a local flush if the mm
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* only ran on the local cpu.
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*/
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preempt_disable();
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atomic_inc(&mm->context.flush_count);
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/* Reset TLB flush mask */
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cpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);
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barrier();
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gmap_asce = READ_ONCE(mm->context.gmap_asce);
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if (MACHINE_HAS_IDTE && gmap_asce != -1UL) {
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if (gmap_asce)
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__tlb_flush_idte(gmap_asce);
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__tlb_flush_idte(mm->context.asce);
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} else {
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/* Global TLB flush */
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__tlb_flush_global();
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}
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atomic_dec(&mm->context.flush_count);
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preempt_enable();
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}
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static inline void __tlb_flush_kernel(void)
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{
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if (MACHINE_HAS_IDTE)
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__tlb_flush_idte(init_mm.context.asce);
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else
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__tlb_flush_global();
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}
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#else
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#define __tlb_flush_global() __tlb_flush_local()
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/*
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* Flush TLB entries for a specific ASCE on all CPUs.
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*/
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static inline void __tlb_flush_mm(struct mm_struct *mm)
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{
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__tlb_flush_local();
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}
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static inline void __tlb_flush_kernel(void)
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{
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__tlb_flush_local();
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}
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#endif
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static inline void __tlb_flush_mm_lazy(struct mm_struct * mm)
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{
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spin_lock(&mm->context.lock);
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if (mm->context.flush_mm) {
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mm->context.flush_mm = 0;
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__tlb_flush_mm(mm);
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}
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spin_unlock(&mm->context.lock);
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}
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/*
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* TLB flushing:
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* flush_tlb() - flushes the current mm struct TLBs
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* flush_tlb_all() - flushes all processes TLBs
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* flush_tlb_mm(mm) - flushes the specified mm context TLB's
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* flush_tlb_page(vma, vmaddr) - flushes one page
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* flush_tlb_range(vma, start, end) - flushes a range of pages
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* flush_tlb_kernel_range(start, end) - flushes a range of kernel pages
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*/
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/*
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* flush_tlb_mm goes together with ptep_set_wrprotect for the
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* copy_page_range operation and flush_tlb_range is related to
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* ptep_get_and_clear for change_protection. ptep_set_wrprotect and
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* ptep_get_and_clear do not flush the TLBs directly if the mm has
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* only one user. At the end of the update the flush_tlb_mm and
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* flush_tlb_range functions need to do the flush.
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*/
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#define flush_tlb() do { } while (0)
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#define flush_tlb_all() do { } while (0)
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#define flush_tlb_page(vma, addr) do { } while (0)
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static inline void flush_tlb_mm(struct mm_struct *mm)
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{
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__tlb_flush_mm_lazy(mm);
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}
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static inline void flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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__tlb_flush_mm_lazy(vma->vm_mm);
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}
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static inline void flush_tlb_kernel_range(unsigned long start,
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unsigned long end)
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{
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__tlb_flush_kernel();
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}
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#endif /* _S390_TLBFLUSH_H */
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