384 lines
9.4 KiB
C
384 lines
9.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2016 Intel Corporation
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*
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* Author: Gayatri Kammela <gayatri.kammela@intel.com>
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* Author: Megha Dey <megha.dey@linux.intel.com>
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*/
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#ifdef CONFIG_AS_AVX512
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#include <linux/raid/pq.h>
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#include "x86.h"
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static int raid6_has_avx512(void)
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{
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return boot_cpu_has(X86_FEATURE_AVX2) &&
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boot_cpu_has(X86_FEATURE_AVX) &&
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boot_cpu_has(X86_FEATURE_AVX512F) &&
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boot_cpu_has(X86_FEATURE_AVX512BW) &&
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boot_cpu_has(X86_FEATURE_AVX512VL) &&
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boot_cpu_has(X86_FEATURE_AVX512DQ);
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}
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static void raid6_2data_recov_avx512(int disks, size_t bytes, int faila,
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int failb, void **ptrs)
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{
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u8 *p, *q, *dp, *dq;
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const u8 *pbmul; /* P multiplier table for B data */
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const u8 *qmul; /* Q multiplier table (for both) */
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const u8 x0f = 0x0f;
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p = (u8 *)ptrs[disks-2];
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q = (u8 *)ptrs[disks-1];
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/*
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* Compute syndrome with zero for the missing data pages
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* Use the dead data pages as temporary storage for
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* delta p and delta q
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*/
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dp = (u8 *)ptrs[faila];
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ptrs[faila] = (void *)raid6_empty_zero_page;
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ptrs[disks-2] = dp;
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dq = (u8 *)ptrs[failb];
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ptrs[failb] = (void *)raid6_empty_zero_page;
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ptrs[disks-1] = dq;
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raid6_call.gen_syndrome(disks, bytes, ptrs);
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/* Restore pointer table */
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ptrs[faila] = dp;
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ptrs[failb] = dq;
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ptrs[disks-2] = p;
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ptrs[disks-1] = q;
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/* Now, pick the proper data tables */
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pbmul = raid6_vgfmul[raid6_gfexi[failb-faila]];
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qmul = raid6_vgfmul[raid6_gfinv[raid6_gfexp[faila] ^
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raid6_gfexp[failb]]];
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kernel_fpu_begin();
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/* zmm0 = x0f[16] */
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asm volatile("vpbroadcastb %0, %%zmm7" : : "m" (x0f));
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while (bytes) {
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#ifdef CONFIG_X86_64
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asm volatile("vmovdqa64 %0, %%zmm1\n\t"
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"vmovdqa64 %1, %%zmm9\n\t"
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"vmovdqa64 %2, %%zmm0\n\t"
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"vmovdqa64 %3, %%zmm8\n\t"
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"vpxorq %4, %%zmm1, %%zmm1\n\t"
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"vpxorq %5, %%zmm9, %%zmm9\n\t"
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"vpxorq %6, %%zmm0, %%zmm0\n\t"
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"vpxorq %7, %%zmm8, %%zmm8"
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:
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: "m" (q[0]), "m" (q[64]), "m" (p[0]),
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"m" (p[64]), "m" (dq[0]), "m" (dq[64]),
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"m" (dp[0]), "m" (dp[64]));
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/*
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* 1 = dq[0] ^ q[0]
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* 9 = dq[64] ^ q[64]
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* 0 = dp[0] ^ p[0]
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* 8 = dp[64] ^ p[64]
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*/
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asm volatile("vbroadcasti64x2 %0, %%zmm4\n\t"
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"vbroadcasti64x2 %1, %%zmm5"
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:
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: "m" (qmul[0]), "m" (qmul[16]));
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asm volatile("vpsraw $4, %%zmm1, %%zmm3\n\t"
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"vpsraw $4, %%zmm9, %%zmm12\n\t"
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"vpandq %%zmm7, %%zmm1, %%zmm1\n\t"
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"vpandq %%zmm7, %%zmm9, %%zmm9\n\t"
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"vpandq %%zmm7, %%zmm3, %%zmm3\n\t"
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"vpandq %%zmm7, %%zmm12, %%zmm12\n\t"
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"vpshufb %%zmm9, %%zmm4, %%zmm14\n\t"
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"vpshufb %%zmm1, %%zmm4, %%zmm4\n\t"
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"vpshufb %%zmm12, %%zmm5, %%zmm15\n\t"
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"vpshufb %%zmm3, %%zmm5, %%zmm5\n\t"
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"vpxorq %%zmm14, %%zmm15, %%zmm15\n\t"
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"vpxorq %%zmm4, %%zmm5, %%zmm5"
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:
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: );
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/*
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* 5 = qx[0]
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* 15 = qx[64]
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*/
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asm volatile("vbroadcasti64x2 %0, %%zmm4\n\t"
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"vbroadcasti64x2 %1, %%zmm1\n\t"
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"vpsraw $4, %%zmm0, %%zmm2\n\t"
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"vpsraw $4, %%zmm8, %%zmm6\n\t"
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"vpandq %%zmm7, %%zmm0, %%zmm3\n\t"
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"vpandq %%zmm7, %%zmm8, %%zmm14\n\t"
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"vpandq %%zmm7, %%zmm2, %%zmm2\n\t"
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"vpandq %%zmm7, %%zmm6, %%zmm6\n\t"
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"vpshufb %%zmm14, %%zmm4, %%zmm12\n\t"
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"vpshufb %%zmm3, %%zmm4, %%zmm4\n\t"
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"vpshufb %%zmm6, %%zmm1, %%zmm13\n\t"
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"vpshufb %%zmm2, %%zmm1, %%zmm1\n\t"
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"vpxorq %%zmm4, %%zmm1, %%zmm1\n\t"
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"vpxorq %%zmm12, %%zmm13, %%zmm13"
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:
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: "m" (pbmul[0]), "m" (pbmul[16]));
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/*
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* 1 = pbmul[px[0]]
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* 13 = pbmul[px[64]]
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*/
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asm volatile("vpxorq %%zmm5, %%zmm1, %%zmm1\n\t"
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"vpxorq %%zmm15, %%zmm13, %%zmm13"
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:
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: );
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/*
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* 1 = db = DQ
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* 13 = db[64] = DQ[64]
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*/
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asm volatile("vmovdqa64 %%zmm1, %0\n\t"
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"vmovdqa64 %%zmm13,%1\n\t"
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"vpxorq %%zmm1, %%zmm0, %%zmm0\n\t"
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"vpxorq %%zmm13, %%zmm8, %%zmm8"
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:
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: "m" (dq[0]), "m" (dq[64]));
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asm volatile("vmovdqa64 %%zmm0, %0\n\t"
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"vmovdqa64 %%zmm8, %1"
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:
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: "m" (dp[0]), "m" (dp[64]));
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bytes -= 128;
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p += 128;
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q += 128;
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dp += 128;
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dq += 128;
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#else
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asm volatile("vmovdqa64 %0, %%zmm1\n\t"
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"vmovdqa64 %1, %%zmm0\n\t"
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"vpxorq %2, %%zmm1, %%zmm1\n\t"
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"vpxorq %3, %%zmm0, %%zmm0"
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:
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: "m" (*q), "m" (*p), "m"(*dq), "m" (*dp));
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/* 1 = dq ^ q; 0 = dp ^ p */
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asm volatile("vbroadcasti64x2 %0, %%zmm4\n\t"
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"vbroadcasti64x2 %1, %%zmm5"
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:
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: "m" (qmul[0]), "m" (qmul[16]));
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/*
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* 1 = dq ^ q
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* 3 = dq ^ p >> 4
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*/
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asm volatile("vpsraw $4, %%zmm1, %%zmm3\n\t"
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"vpandq %%zmm7, %%zmm1, %%zmm1\n\t"
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"vpandq %%zmm7, %%zmm3, %%zmm3\n\t"
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"vpshufb %%zmm1, %%zmm4, %%zmm4\n\t"
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"vpshufb %%zmm3, %%zmm5, %%zmm5\n\t"
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"vpxorq %%zmm4, %%zmm5, %%zmm5"
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:
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: );
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/* 5 = qx */
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asm volatile("vbroadcasti64x2 %0, %%zmm4\n\t"
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"vbroadcasti64x2 %1, %%zmm1"
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:
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: "m" (pbmul[0]), "m" (pbmul[16]));
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asm volatile("vpsraw $4, %%zmm0, %%zmm2\n\t"
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"vpandq %%zmm7, %%zmm0, %%zmm3\n\t"
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"vpandq %%zmm7, %%zmm2, %%zmm2\n\t"
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"vpshufb %%zmm3, %%zmm4, %%zmm4\n\t"
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"vpshufb %%zmm2, %%zmm1, %%zmm1\n\t"
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"vpxorq %%zmm4, %%zmm1, %%zmm1"
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:
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: );
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/* 1 = pbmul[px] */
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asm volatile("vpxorq %%zmm5, %%zmm1, %%zmm1\n\t"
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/* 1 = db = DQ */
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"vmovdqa64 %%zmm1, %0\n\t"
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:
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: "m" (dq[0]));
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asm volatile("vpxorq %%zmm1, %%zmm0, %%zmm0\n\t"
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"vmovdqa64 %%zmm0, %0"
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:
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: "m" (dp[0]));
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bytes -= 64;
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p += 64;
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q += 64;
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dp += 64;
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dq += 64;
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#endif
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}
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kernel_fpu_end();
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}
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static void raid6_datap_recov_avx512(int disks, size_t bytes, int faila,
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void **ptrs)
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{
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u8 *p, *q, *dq;
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const u8 *qmul; /* Q multiplier table */
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const u8 x0f = 0x0f;
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p = (u8 *)ptrs[disks-2];
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q = (u8 *)ptrs[disks-1];
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/*
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* Compute syndrome with zero for the missing data page
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* Use the dead data page as temporary storage for delta q
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*/
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dq = (u8 *)ptrs[faila];
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ptrs[faila] = (void *)raid6_empty_zero_page;
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ptrs[disks-1] = dq;
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raid6_call.gen_syndrome(disks, bytes, ptrs);
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/* Restore pointer table */
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ptrs[faila] = dq;
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ptrs[disks-1] = q;
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/* Now, pick the proper data tables */
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qmul = raid6_vgfmul[raid6_gfinv[raid6_gfexp[faila]]];
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kernel_fpu_begin();
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asm volatile("vpbroadcastb %0, %%zmm7" : : "m" (x0f));
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while (bytes) {
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#ifdef CONFIG_X86_64
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asm volatile("vmovdqa64 %0, %%zmm3\n\t"
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"vmovdqa64 %1, %%zmm8\n\t"
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"vpxorq %2, %%zmm3, %%zmm3\n\t"
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"vpxorq %3, %%zmm8, %%zmm8"
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:
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: "m" (dq[0]), "m" (dq[64]), "m" (q[0]),
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"m" (q[64]));
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/*
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* 3 = q[0] ^ dq[0]
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* 8 = q[64] ^ dq[64]
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*/
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asm volatile("vbroadcasti64x2 %0, %%zmm0\n\t"
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"vmovapd %%zmm0, %%zmm13\n\t"
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"vbroadcasti64x2 %1, %%zmm1\n\t"
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"vmovapd %%zmm1, %%zmm14"
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:
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: "m" (qmul[0]), "m" (qmul[16]));
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asm volatile("vpsraw $4, %%zmm3, %%zmm6\n\t"
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"vpsraw $4, %%zmm8, %%zmm12\n\t"
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"vpandq %%zmm7, %%zmm3, %%zmm3\n\t"
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"vpandq %%zmm7, %%zmm8, %%zmm8\n\t"
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"vpandq %%zmm7, %%zmm6, %%zmm6\n\t"
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"vpandq %%zmm7, %%zmm12, %%zmm12\n\t"
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"vpshufb %%zmm3, %%zmm0, %%zmm0\n\t"
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"vpshufb %%zmm8, %%zmm13, %%zmm13\n\t"
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"vpshufb %%zmm6, %%zmm1, %%zmm1\n\t"
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"vpshufb %%zmm12, %%zmm14, %%zmm14\n\t"
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"vpxorq %%zmm0, %%zmm1, %%zmm1\n\t"
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"vpxorq %%zmm13, %%zmm14, %%zmm14"
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:
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: );
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/*
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* 1 = qmul[q[0] ^ dq[0]]
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* 14 = qmul[q[64] ^ dq[64]]
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*/
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asm volatile("vmovdqa64 %0, %%zmm2\n\t"
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"vmovdqa64 %1, %%zmm12\n\t"
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"vpxorq %%zmm1, %%zmm2, %%zmm2\n\t"
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"vpxorq %%zmm14, %%zmm12, %%zmm12"
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:
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: "m" (p[0]), "m" (p[64]));
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/*
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* 2 = p[0] ^ qmul[q[0] ^ dq[0]]
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* 12 = p[64] ^ qmul[q[64] ^ dq[64]]
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*/
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asm volatile("vmovdqa64 %%zmm1, %0\n\t"
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"vmovdqa64 %%zmm14, %1\n\t"
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"vmovdqa64 %%zmm2, %2\n\t"
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"vmovdqa64 %%zmm12,%3"
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:
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: "m" (dq[0]), "m" (dq[64]), "m" (p[0]),
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"m" (p[64]));
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bytes -= 128;
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p += 128;
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q += 128;
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dq += 128;
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#else
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asm volatile("vmovdqa64 %0, %%zmm3\n\t"
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"vpxorq %1, %%zmm3, %%zmm3"
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:
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: "m" (dq[0]), "m" (q[0]));
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/* 3 = q ^ dq */
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asm volatile("vbroadcasti64x2 %0, %%zmm0\n\t"
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"vbroadcasti64x2 %1, %%zmm1"
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:
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: "m" (qmul[0]), "m" (qmul[16]));
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asm volatile("vpsraw $4, %%zmm3, %%zmm6\n\t"
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"vpandq %%zmm7, %%zmm3, %%zmm3\n\t"
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"vpandq %%zmm7, %%zmm6, %%zmm6\n\t"
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"vpshufb %%zmm3, %%zmm0, %%zmm0\n\t"
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"vpshufb %%zmm6, %%zmm1, %%zmm1\n\t"
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"vpxorq %%zmm0, %%zmm1, %%zmm1"
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:
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: );
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/* 1 = qmul[q ^ dq] */
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asm volatile("vmovdqa64 %0, %%zmm2\n\t"
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"vpxorq %%zmm1, %%zmm2, %%zmm2"
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:
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: "m" (p[0]));
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/* 2 = p ^ qmul[q ^ dq] */
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asm volatile("vmovdqa64 %%zmm1, %0\n\t"
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"vmovdqa64 %%zmm2, %1"
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:
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: "m" (dq[0]), "m" (p[0]));
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bytes -= 64;
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p += 64;
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q += 64;
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dq += 64;
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#endif
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}
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kernel_fpu_end();
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}
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const struct raid6_recov_calls raid6_recov_avx512 = {
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.data2 = raid6_2data_recov_avx512,
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.datap = raid6_datap_recov_avx512,
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.valid = raid6_has_avx512,
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#ifdef CONFIG_X86_64
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.name = "avx512x2",
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#else
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.name = "avx512x1",
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#endif
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.priority = 3,
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};
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#else
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#warning "your version of binutils lacks AVX512 support"
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#endif
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