24 lines
968 B
C
24 lines
968 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASMPARISC_SHMPARAM_H
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#define _ASMPARISC_SHMPARAM_H
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/*
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* PA-RISC uses virtually indexed & physically tagged (VIPT) caches
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* which has strict requirements when two pages to the same physical
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* address are accessed through different mappings. Read the section
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* "Address Aliasing" in the arch docs for more detail:
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* PA-RISC 1.1 (page 3-6):
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* https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
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* PA-RISC 2.0 (page F-5):
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* https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
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*
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* For Linux we allow kernel and userspace to map pages on page size
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* granularity (SHMLBA) but have to ensure that, if two pages are
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* mapped to the same physical address, the virtual and physical
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* addresses modulo SHM_COLOUR are identical.
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*/
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#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
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#define SHM_COLOUR 0x00400000 /* shared mappings colouring */
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#endif /* _ASMPARISC_SHMPARAM_H */
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