62 lines
1.3 KiB
Plaintext
62 lines
1.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/**
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* DT overlay for SERDES personality card: 1lane PCIe + USB3.0 DRD on AM654 EVM
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*
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* Copyright (C) 2018-2024 Texas Instruments Incorporated - http://www.ti.com/
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/phy/phy-am654-serdes.h>
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#include "k3-pinctrl.h"
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&serdes1 {
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status = "okay";
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};
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&pcie1_rc {
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num-lanes = <1>;
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phys = <&serdes1 PHY_TYPE_PCIE 0>;
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phy-names = "pcie-phy0";
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reset-gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&main_pmx0 {
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usb0_pins_default: usb0-default-pins {
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pinctrl-single,pins = <
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AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
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>;
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};
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};
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&serdes0 {
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status = "okay";
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assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
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assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>;
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};
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&dwc3_0 {
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status = "okay";
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assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
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<&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */
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phys = <&serdes0 PHY_TYPE_USB3 0>;
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phy-names = "usb3-phy";
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};
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&usb0 {
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pinctrl-names = "default";
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pinctrl-0 = <&usb0_pins_default>;
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dr_mode = "host";
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maximum-speed = "super-speed";
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snps,dis-u1-entry-quirk;
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snps,dis-u2-entry-quirk;
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};
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&usb0_phy {
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status = "okay";
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};
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