190 lines
4.3 KiB
Plaintext
190 lines
4.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) Siemens AG, 2023
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*
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* Authors:
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* Baocheng Su <baocheng.su@siemens.com>
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* Chao Zeng <chao.zeng@siemens.com>
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* Huaqian Li <huaqian.li@siemens.com>
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*
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* AM6548-based (quad-core) IOT2050 SM variant, Product Generation 2
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* 4 GB RAM, 16 GB eMMC, USB-serial converter on connector X30
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*
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* Product homepage:
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* https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html
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*/
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/dts-v1/;
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#include "k3-am6548-iot2050-advanced-common.dtsi"
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#include "k3-am65-iot2050-common-pg2.dtsi"
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/ {
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compatible = "siemens,iot2050-advanced-sm", "ti,am654";
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model = "SIMATIC IOT2050 Advanced SM";
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memory@80000000 {
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device_type = "memory";
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/* 4G RAM */
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reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
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<0x00000008 0x80000000 0x00000000 0x80000000>;
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};
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aliases {
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spi1 = &main_spi0;
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};
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leds {
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pinctrl-0 = <&leds_pins_default>, <&user1_led_pins>;
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led-2 {
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gpios = <&wkup_gpio0 52 GPIO_ACTIVE_HIGH>;
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};
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led-3 {
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gpios = <&wkup_gpio0 53 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&main_pmx0 {
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main_pcie_enable_pins_default: main-pcie-enable-default-pins {
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pinctrl-single,pins = <
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AM65X_IOPAD(0x01d8, PIN_OUTPUT, 7) /* (AH12) GPIO1_22 */
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>;
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};
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main_spi0_pins: main-spi0-default-pins {
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pinctrl-single,pins = <
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AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
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AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
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AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
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AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
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>;
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};
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};
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&main_pmx1 {
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asic_spi_mux_ctrl_pin: asic-spi-mux-ctrl-default-pins {
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pinctrl-single,pins = <
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AM65X_IOPAD(0x0010, PIN_OUTPUT, 7) /* (D21) GPIO1_86 */
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>;
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};
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};
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&wkup_pmx0 {
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user1_led_pins: user1-led-default-pins {
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pinctrl-single,pins = <
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/* (AB1) WKUP_UART0_RXD:WKUP_GPIO0_52, as USER 1 led red */
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AM65X_WKUP_IOPAD(0x00a0, PIN_OUTPUT, 7)
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/* (AB5) WKUP_UART0_TXD:WKUP_GPIO0_53, as USER 1 led green */
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AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 7)
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>;
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};
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soc_asic_pins: soc-asic-default-pins {
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pinctrl-single,pins = <
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AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 7) /* (P4) WKUP_GPIO0_29 */
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AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7) /* (P5) WKUP_GPIO0_30 */
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AM65X_WKUP_IOPAD(0x004c, PIN_INPUT, 7) /* (P1) WKUP_GPIO0_31 */
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>;
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};
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};
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&main_gpio0 {
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gpio-line-names = "main_gpio0-base";
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};
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&main_gpio1 {
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pinctrl-names = "default";
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pinctrl-0 =
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<&cp2102n_reset_pin_default>,
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<&main_pcie_enable_pins_default>,
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<&asic_spi_mux_ctrl_pin>;
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gpio-line-names =
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/* 0..9 */
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"", "", "", "", "", "", "", "", "", "",
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/* 10..19 */
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"", "", "", "", "", "", "", "", "", "",
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/* 20..29 */
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"", "", "", "", "CP2102N-RESET", "", "", "", "", "",
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/* 30..39 */
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"", "", "", "", "", "", "", "", "", "",
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/* 40..49 */
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"", "", "", "", "", "", "", "", "", "",
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/* 50..59 */
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"", "", "", "", "", "", "", "", "", "",
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/* 60..69 */
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"", "", "", "", "", "", "", "", "", "",
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/* 70..79 */
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"", "", "", "", "", "", "", "", "", "",
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/* 80..86 */
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"", "", "", "", "", "", "ASIC-spi-mux-ctrl";
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};
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&wkup_gpio0 {
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pinctrl-names = "default";
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pinctrl-0 =
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<&push_button_pins_default>,
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<&db9_com_mode_pins_default>,
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<&soc_asic_pins>;
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gpio-line-names =
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/* 0..9 */
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"wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0",
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"UART0-enable", "UART0-terminate", "", "WIFI-disable",
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/* 10..19 */
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"", "", "", "", "", "", "", "", "", "",
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/* 20..29 */
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"", "", "", "", "", "USER-button", "", "", "","ASIC-gpio-0",
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/* 30..31 */
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"ASIC-gpio-1", "ASIC-gpio-2";
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};
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&main_spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_spi0_pins>;
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#address-cells = <1>;
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#size-cells= <0>;
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};
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&mcu_spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mcu_spi0_pins_default>;
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};
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&main_i2c3 {
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accelerometer: lsm6dso@6a {
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compatible = "st,lsm6dso";
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reg = <0x6a>;
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};
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};
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&dss {
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status = "disabled";
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};
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&serdes0 {
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assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
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assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
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};
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&serdes1 {
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status = "disabled";
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};
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&pcie0_rc {
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pinctrl-names = "default";
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pinctrl-0 = <&minipcie_pins_default>;
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num-lanes = <1>;
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phys = <&serdes0 PHY_TYPE_PCIE 1>;
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phy-names = "pcie-phy0";
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reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&pcie1_rc {
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status = "disabled";
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};
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