474 lines
12 KiB
Plaintext
474 lines
12 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/*
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* Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
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*/
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/dts-v1/;
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#include "k3-j7200-som-p0.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/net/ti-dp83867.h>
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#include <dt-bindings/phy/phy.h>
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#include "k3-serdes.h"
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/ {
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compatible = "ti,j7200-evm", "ti,j7200";
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model = "Texas Instruments J7200 EVM";
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aliases {
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serial0 = &wkup_uart0;
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serial1 = &mcu_uart0;
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serial2 = &main_uart0;
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serial3 = &main_uart1;
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serial5 = &main_uart3;
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mmc0 = &main_sdhci0;
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mmc1 = &main_sdhci1;
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};
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chosen {
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stdout-path = "serial2:115200n8";
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};
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evm_12v0: fixedregulator-evm12v0 {
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/* main supply */
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compatible = "regulator-fixed";
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regulator-name = "evm_12v0";
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vsys_3v3: fixedregulator-vsys3v3 {
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/* Output of LM5140 */
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compatible = "regulator-fixed";
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regulator-name = "vsys_3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&evm_12v0>;
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regulator-always-on;
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regulator-boot-on;
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};
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vsys_5v0: fixedregulator-vsys5v0 {
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/* Output of LM5140 */
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compatible = "regulator-fixed";
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regulator-name = "vsys_5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&evm_12v0>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_mmc1: fixedregulator-sd {
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/* Output of TPS22918 */
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compatible = "regulator-fixed";
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regulator-name = "vdd_mmc1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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enable-active-high;
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vin-supply = <&vsys_3v3>;
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gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
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};
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vdd_sd_dv: gpio-regulator-TLV71033 {
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/* Output of TLV71033 */
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compatible = "regulator-gpio";
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regulator-name = "tlv71033";
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pinctrl-names = "default";
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pinctrl-0 = <&vdd_sd_dv_pins_default>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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vin-supply = <&vsys_5v0>;
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gpios = <&main_gpio0 55 GPIO_ACTIVE_HIGH>;
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states = <1800000 0x0>,
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<3300000 0x1>;
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};
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transceiver1: can-phy1 {
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compatible = "ti,tcan1043";
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#phy-cells = <0>;
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max-bitrate = <5000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
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standby-gpios = <&wkup_gpio0 58 GPIO_ACTIVE_LOW>;
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enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>;
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};
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transceiver2: can-phy2 {
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compatible = "ti,tcan1042";
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#phy-cells = <0>;
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max-bitrate = <5000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&mcu_mcan1_gpio_pins_default>;
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standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>;
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};
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transceiver3: can-phy3 {
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compatible = "ti,tcan1043";
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#phy-cells = <0>;
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max-bitrate = <5000000>;
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standby-gpios = <&exp2 7 GPIO_ACTIVE_LOW>;
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enable-gpios = <&exp2 6 GPIO_ACTIVE_HIGH>;
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mux-states = <&mux0 1>;
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};
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};
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&wkup_pmx0 {
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};
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&wkup_pmx2 {
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mcu_uart0_pins_default: mcu-uart0-default-pins {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x90, PIN_INPUT, 0) /* (E20) MCU_UART0_CTSn */
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J721E_WKUP_IOPAD(0x94, PIN_OUTPUT, 0) /* (E21) MCU_UART0_RTSn */
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J721E_WKUP_IOPAD(0x8c, PIN_INPUT, 0) /* (D20) MCU_UART0_RXD */
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J721E_WKUP_IOPAD(0x88, PIN_OUTPUT, 0) /* (D19) MCU_UART0_TXD */
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>;
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};
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wkup_uart0_pins_default: wkup-uart0-default-pins {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */
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J721E_WKUP_IOPAD(0x4c, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */
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>;
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};
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mcu_cpsw_pins_default: mcu-cpsw-default-pins {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
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J721E_WKUP_IOPAD(0x0004, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
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J721E_WKUP_IOPAD(0x0008, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
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J721E_WKUP_IOPAD(0x000c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
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J721E_WKUP_IOPAD(0x0010, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
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J721E_WKUP_IOPAD(0x0014, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
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J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
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J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
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J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
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J721E_WKUP_IOPAD(0x002c, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
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J721E_WKUP_IOPAD(0x0018, PIN_OUTPUT, 0) /* MCU_RGMII1_TXC */
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J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
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>;
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};
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wkup_gpio_pins_default: wkup-gpio-default-pins {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x70, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_6 */
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>;
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};
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mcu_mdio_pins_default: mcu-mdio1-default-pins {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x0034, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
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J721E_WKUP_IOPAD(0x0030, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
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>;
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};
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mcu_mcan0_pins_default: mcu-mcan0-default-pins {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x54, PIN_INPUT, 0) /* (A17) MCU_MCAN0_RX */
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J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (A16) MCU_MCAN0_TX */
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>;
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};
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mcu_mcan1_pins_default: mcu-mcan1-default-pins {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x6c, PIN_INPUT, 0) /* (B16) WKUP_GPIO0_5.MCU_MCAN1_RX */
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J721E_WKUP_IOPAD(0x68, PIN_OUTPUT, 0) /* (D13) WKUP_GPIO0_4.MCU_MCAN1_TX */
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>;
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};
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mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x58, PIN_INPUT, 7) /* (B18) WKUP_GPIO0_0 */
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J721E_WKUP_IOPAD(0x40, PIN_INPUT, 7) /* (B17) MCU_SPI0_D1 */
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>;
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};
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mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x60, PIN_INPUT, 7) /* (D14) WKUP_GPIO0_2 */
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>;
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};
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};
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&main_pmx0 {
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main_uart0_pins_default: main-uart0-default-pins {
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pinctrl-single,pins = <
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J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */
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J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */
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J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */
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J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */
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>;
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};
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main_uart1_pins_default: main-uart1-default-pins {
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pinctrl-single,pins = <
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J721E_IOPAD(0xb8, PIN_INPUT, 0) /* (T18) UART1_RXD */
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J721E_IOPAD(0xbc, PIN_INPUT, 0) /* (T20) UART1_TXD */
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>;
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};
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main_uart3_pins_default: main-uart3-default-pins {
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pinctrl-single,pins = <
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J721E_IOPAD(0x60, PIN_INPUT, 11) /* (T15) MCAN8_TX.UART3_CTSn */
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J721E_IOPAD(0x30, PIN_INPUT, 11) /* (Y18) MCAN2_TX.UART3_RXD */
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>;
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};
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main_i2c1_pins_default: main-i2c1-default-pins {
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pinctrl-single,pins = <
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J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */
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J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */
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>;
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};
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main_mmc1_pins_default: main-mmc1-default-pins {
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pinctrl-single,pins = <
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J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */
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J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */
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J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
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J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */
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J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */
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J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
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J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
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J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */
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>;
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};
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vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
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pinctrl-single,pins = <
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J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */
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>;
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};
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main_mcan3_pins_default: main-mcan3-default-pins {
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pinctrl-single,pins = <
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J721E_IOPAD(0x3c, PIN_INPUT, 0) /* (W16) MCAN3_RX */
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J721E_IOPAD(0x38, PIN_OUTPUT, 0) /* (Y21) MCAN3_TX */
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>;
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};
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};
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&main_pmx1 {
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main_usbss0_pins_default: main-usbss0-default-pins {
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pinctrl-single,pins = <
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J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
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>;
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};
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};
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&wkup_uart0 {
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/* Wakeup UART is used by System firmware */
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status = "reserved";
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_uart0_pins_default>;
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};
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&mcu_uart0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mcu_uart0_pins_default>;
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};
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&main_uart0 {
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status = "okay";
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/* Shared with ATF on this platform */
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power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
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pinctrl-names = "default";
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pinctrl-0 = <&main_uart0_pins_default>;
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};
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&main_uart1 {
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status = "okay";
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/* Default pinmux */
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pinctrl-names = "default";
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pinctrl-0 = <&main_uart1_pins_default>;
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};
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&main_uart2 {
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/* MAIN UART 2 is used by R5F firmware */
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status = "reserved";
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};
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&main_uart3 {
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/* Shared with MCAN Interface */
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&main_uart3_pins_default>;
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};
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&main_gpio0 {
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status = "okay";
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};
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&wkup_gpio0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_gpio_pins_default>;
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};
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&mcu_cpsw {
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pinctrl-names = "default";
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pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
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};
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&davinci_mdio {
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phy0: ethernet-phy@0 {
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reg = <0>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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};
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};
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&cpsw_port1 {
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phy-mode = "rgmii-rxid";
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phy-handle = <&phy0>;
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};
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&main_i2c0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c0_pins_default>;
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clock-frequency = <400000>;
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exp1: gpio@20 {
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compatible = "ti,tca6416";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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exp2: gpio@22 {
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compatible = "ti,tca6424";
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reg = <0x22>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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/*
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* The j7200 CPB board is identical to the CPB used for J721E, the SOMs can be
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* swapped on the CPB.
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*
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* main_i2c1 of J7200 is connected to the CPB i2c bus labeled as i2c3.
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* The i2c1 of the CPB (as it is labeled) is not connected to j7200.
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*/
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&main_i2c1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c1_pins_default>;
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clock-frequency = <400000>;
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exp3: gpio@20 {
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compatible = "ti,tca6408";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-line-names = "CODEC_RSTz", "CODEC_SPARE1", "UB926_RESETn",
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"UB926_LOCK", "UB926_PWR_SW_CNTRL",
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"UB926_TUNER_RESET", "UB926_GPIO_SPARE", "";
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};
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};
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&main_sdhci0 {
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/* eMMC */
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status = "okay";
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non-removable;
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ti,driver-strength-ohm = <50>;
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disable-wp;
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};
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&main_sdhci1 {
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/* SD card */
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status = "okay";
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pinctrl-0 = <&main_mmc1_pins_default>;
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pinctrl-names = "default";
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vmmc-supply = <&vdd_mmc1>;
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vqmmc-supply = <&vdd_sd_dv>;
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ti,driver-strength-ohm = <50>;
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disable-wp;
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};
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&serdes_ln_ctrl {
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idle-states = <J7200_SERDES0_LANE0_PCIE1_LANE0>, <J7200_SERDES0_LANE1_PCIE1_LANE1>,
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<J7200_SERDES0_LANE2_QSGMII_LANE1>, <J7200_SERDES0_LANE3_IP4_UNUSED>;
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};
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&usb_serdes_mux {
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idle-states = <1>; /* USB0 to SERDES lane 3 */
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};
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&usbss0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_usbss0_pins_default>;
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ti,vbus-divider;
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ti,usb2-only;
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};
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&usb0 {
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dr_mode = "otg";
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maximum-speed = "high-speed";
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};
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&tscadc0 {
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adc {
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ti,adc-channels = <0 1 2 3 4 5 6 7>;
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};
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};
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&serdes_refclk {
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clock-frequency = <100000000>;
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};
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&serdes0 {
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serdes0_pcie_link: phy@0 {
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reg = <0>;
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cdns,num-lanes = <2>;
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#phy-cells = <0>;
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cdns,phy-type = <PHY_TYPE_PCIE>;
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resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
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};
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serdes0_qsgmii_link: phy@1 {
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reg = <2>;
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cdns,num-lanes = <1>;
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#phy-cells = <0>;
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cdns,phy-type = <PHY_TYPE_QSGMII>;
|
|
resets = <&serdes_wiz0 3>;
|
|
};
|
|
};
|
|
|
|
&pcie1_rc {
|
|
status = "okay";
|
|
reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
|
|
phys = <&serdes0_pcie_link>;
|
|
phy-names = "pcie-phy";
|
|
num-lanes = <2>;
|
|
};
|
|
|
|
&mcu_mcan0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcu_mcan0_pins_default>;
|
|
phys = <&transceiver1>;
|
|
};
|
|
|
|
&mcu_mcan1 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcu_mcan1_pins_default>;
|
|
phys = <&transceiver2>;
|
|
};
|
|
|
|
&main_mcan3 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&main_mcan3_pins_default>;
|
|
phys = <&transceiver3>;
|
|
};
|