387 lines
9.3 KiB
Plaintext
387 lines
9.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/*
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* Device Tree file for the J722S EVM
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* Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
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*
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* Schematics: https://www.ti.com/lit/zip/sprr495
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*/
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/dts-v1/;
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#include <dt-bindings/net/ti-dp83867.h>
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#include "k3-j722s.dtsi"
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/ {
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compatible = "ti,j722s-evm", "ti,j722s";
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model = "Texas Instruments J722S EVM";
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aliases {
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serial0 = &wkup_uart0;
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serial2 = &main_uart0;
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mmc0 = &sdhci0;
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mmc1 = &sdhci1;
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};
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chosen {
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stdout-path = &main_uart0;
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};
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memory@80000000 {
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/* 8G RAM */
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reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
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<0x00000008 0x80000000 0x00000001 0x80000000>;
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device_type = "memory";
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bootph-pre-ram;
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};
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reserved_memory: reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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secure_tfa_ddr: tfa@9e780000 {
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reg = <0x00 0x9e780000 0x00 0x80000>;
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no-map;
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};
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secure_ddr: optee@9e800000 {
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reg = <0x00 0x9e800000 0x00 0x01800000>;
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no-map;
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};
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wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0xa0100000 0x00 0xf00000>;
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no-map;
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};
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};
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vmain_pd: regulator-0 {
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/* TPS65988 PD CONTROLLER OUTPUT */
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compatible = "regulator-fixed";
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regulator-name = "vmain_pd";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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bootph-all;
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};
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vsys_5v0: regulator-vsys5v0 {
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/* Output of LM5140 */
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compatible = "regulator-fixed";
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regulator-name = "vsys_5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vmain_pd>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_mmc1: regulator-mmc1 {
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/* TPS22918DBVR */
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compatible = "regulator-fixed";
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regulator-name = "vdd_mmc1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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enable-active-high;
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gpio = <&exp1 15 GPIO_ACTIVE_HIGH>;
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bootph-all;
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};
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vdd_sd_dv: regulator-TLV71033 {
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compatible = "regulator-gpio";
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regulator-name = "tlv71033";
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pinctrl-names = "default";
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pinctrl-0 = <&vdd_sd_dv_pins_default>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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vin-supply = <&vsys_5v0>;
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gpios = <&main_gpio0 70 GPIO_ACTIVE_HIGH>;
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states = <1800000 0x0>,
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<3300000 0x1>;
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};
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vsys_io_1v8: regulator-vsys-io-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vsys_io_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vsys_io_1v2: regulator-vsys-io-1v2 {
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compatible = "regulator-fixed";
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regulator-name = "vsys_io_1v2";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&main_pmx0 {
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main_i2c0_pins_default: main-i2c0-default-pins {
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pinctrl-single,pins = <
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J722S_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D23) I2C0_SCL */
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J722S_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (B22) I2C0_SDA */
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>;
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bootph-all;
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};
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main_uart0_pins_default: main-uart0-default-pins {
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pinctrl-single,pins = <
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J722S_IOPAD(0x01c8, PIN_INPUT, 0) /* (A22) UART0_RXD */
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J722S_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */
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>;
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bootph-all;
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};
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vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
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pinctrl-single,pins = <
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J722S_IOPAD(0x0120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */
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>;
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bootph-all;
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};
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main_mmc1_pins_default: main-mmc1-default-pins {
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pinctrl-single,pins = <
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J722S_IOPAD(0x023c, PIN_INPUT, 0) /* (H22) MMC1_CMD */
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J722S_IOPAD(0x0234, PIN_OUTPUT, 0) /* (H24) MMC1_CLK */
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J722S_IOPAD(0x0230, PIN_INPUT, 0) /* (H23) MMC1_DAT0 */
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J722S_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H20) MMC1_DAT1 */
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J722S_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (J23) MMC1_DAT2 */
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J722S_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */
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J722S_IOPAD(0x0240, PIN_INPUT, 0) /* (B24) MMC1_SDCD */
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>;
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bootph-all;
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};
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mdio_pins_default: mdio-default-pins {
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pinctrl-single,pins = <
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J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */
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J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */
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>;
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};
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ospi0_pins_default: ospi0-default-pins {
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pinctrl-single,pins = <
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J722S_IOPAD(0x0000, PIN_OUTPUT, 0) /* (L24) OSPI0_CLK */
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J722S_IOPAD(0x002c, PIN_OUTPUT, 0) /* (K26) OSPI0_CSn0 */
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J722S_IOPAD(0x000c, PIN_INPUT, 0) /* (K27) OSPI0_D0 */
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J722S_IOPAD(0x0010, PIN_INPUT, 0) /* (L27) OSPI0_D1 */
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J722S_IOPAD(0x0014, PIN_INPUT, 0) /* (L26) OSPI0_D2 */
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J722S_IOPAD(0x0018, PIN_INPUT, 0) /* (L25) OSPI0_D3 */
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J722S_IOPAD(0x001c, PIN_INPUT, 0) /* (L21) OSPI0_D4 */
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J722S_IOPAD(0x0020, PIN_INPUT, 0) /* (M26) OSPI0_D5 */
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J722S_IOPAD(0x0024, PIN_INPUT, 0) /* (N27) OSPI0_D6 */
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J722S_IOPAD(0x0028, PIN_INPUT, 0) /* (M27) OSPI0_D7 */
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J722S_IOPAD(0x0008, PIN_INPUT, 0) /* (L22) OSPI0_DQS */
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>;
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bootph-all;
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};
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rgmii1_pins_default: rgmii1-default-pins {
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pinctrl-single,pins = <
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J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */
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J722S_IOPAD(0x0150, PIN_INPUT, 0) /* (AD27) RGMII1_RD1 */
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J722S_IOPAD(0x0154, PIN_INPUT, 0) /* (AE24) RGMII1_RD2 */
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J722S_IOPAD(0x0158, PIN_INPUT, 0) /* (AE26) RGMII1_RD3 */
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J722S_IOPAD(0x0148, PIN_INPUT, 0) /* (AE27) RGMII1_RXC */
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J722S_IOPAD(0x0144, PIN_INPUT, 0) /* (AD23) RGMII1_RX_CTL */
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J722S_IOPAD(0x0134, PIN_OUTPUT, 0) /* (AF27) RGMII1_TD0 */
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J722S_IOPAD(0x0138, PIN_OUTPUT, 0) /* (AE23) RGMII1_TD1 */
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J722S_IOPAD(0x013c, PIN_OUTPUT, 0) /* (AG25) RGMII1_TD2 */
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J722S_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */
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J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */
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J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */
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>;
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};
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};
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&cpsw3g {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii1_pins_default>;
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};
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&cpsw3g_mdio {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mdio_pins_default>;
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cpsw3g_phy0: ethernet-phy@0 {
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reg = <0>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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ti,min-output-impedance;
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};
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};
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&cpsw_port1 {
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phy-mode = "rgmii-rxid";
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phy-handle = <&cpsw3g_phy0>;
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status = "okay";
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};
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&main_gpio1 {
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status = "okay";
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};
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&main_uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_uart0_pins_default>;
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status = "okay";
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bootph-all;
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};
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&mcu_pmx0 {
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wkup_uart0_pins_default: wkup-uart0-default-pins {
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pinctrl-single,pins = <
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J722S_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C7) WKUP_UART0_CTSn */
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J722S_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (C6) WKUP_UART0_RTSn */
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J722S_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (D8) WKUP_UART0_RXD */
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J722S_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD */
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>;
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bootph-all;
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};
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wkup_i2c0_pins_default: wkup-i2c0-default-pins {
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pinctrl-single,pins = <
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J722S_MCU_IOPAD(0x04c, PIN_INPUT_PULLUP, 0) /* (C7) WKUP_I2C0_SCL */
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J722S_MCU_IOPAD(0x050, PIN_INPUT_PULLUP, 0) /* (C6) WKUP_I2C1_SDA */
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>;
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bootph-all;
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};
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};
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&wkup_uart0 {
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/* WKUP UART0 is used by Device Manager firmware */
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_uart0_pins_default>;
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status = "reserved";
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bootph-all;
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};
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&wkup_i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_i2c0_pins_default>;
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clock-frequency = <400000>;
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status = "okay";
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bootph-all;
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};
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&main_i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c0_pins_default>;
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clock-frequency = <400000>;
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status = "okay";
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bootph-all;
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exp1: gpio@23 {
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compatible = "ti,tca6424";
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reg = <0x23>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-line-names = "TRC_MUX_SEL", "OSPI/ONAND_MUX_SEL",
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"MCASP1_FET_SEL", "CTRL_PM_I2C_OE#",
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"CSI_VIO_SEL", "USB2.0_MUX_SEL",
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"CSI01_MUX_SEL_2", "CSI23_MUX_SEL_2",
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"LMK1_OE1", "LMK1_OE0",
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"LMK2_OE0", "LMK2_OE1",
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"GPIO_RGMII1_RST#", "GPIO_AUD_RSTn",
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"GPIO_eMMC_RSTn", "GPIO_uSD_PWR_EN",
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"USER_LED2", "MCAN0_STB",
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"PCIe0_1L_RC_RSTz", "PCIe0_1L_PRSNT#",
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"ENET1_EXP_SPARE2", "ENET1_EXP_PWRDN",
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"PD_I2ENET1_I2CMUX_SELC_IRQ", "ENET1_EXP_RESETZ";
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};
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};
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&ospi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&ospi0_pins_default>;
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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spi-tx-bus-width = <8>;
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spi-rx-bus-width = <8>;
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spi-max-frequency = <25000000>;
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cdns,tshsl-ns = <60>;
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cdns,tsd2d-ns = <60>;
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cdns,tchsh-ns = <60>;
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cdns,tslch-ns = <60>;
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cdns,read-delay = <4>;
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bootph-all;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "ospi.tiboot3";
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reg = <0x00 0x80000>;
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};
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partition@80000 {
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label = "ospi.tispl";
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reg = <0x80000 0x200000>;
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};
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partition@280000 {
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label = "ospi.u-boot";
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reg = <0x280000 0x400000>;
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};
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partition@680000 {
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label = "ospi.env";
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reg = <0x680000 0x40000>;
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};
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partition@6c0000 {
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label = "ospi.env.backup";
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reg = <0x6c0000 0x40000>;
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};
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partition@800000 {
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label = "ospi.rootfs";
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reg = <0x800000 0x37c0000>;
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};
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partition@3fc0000 {
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label = "ospi.phypattern";
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reg = <0x3fc0000 0x40000>;
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};
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};
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};
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};
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&sdhci0 {
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disable-wp;
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bootph-all;
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ti,driver-strength-ohm = <50>;
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status = "okay";
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};
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&sdhci1 {
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/* SD/MMC */
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vmmc-supply = <&vdd_mmc1>;
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vqmmc-supply = <&vdd_sd_dv>;
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pinctrl-names = "default";
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pinctrl-0 = <&main_mmc1_pins_default>;
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ti,driver-strength-ohm = <50>;
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disable-wp;
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status = "okay";
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bootph-all;
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};
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