94790ec25f
The msm provides timer hardware that is private to each core. Each timer has separate counter and match registers, so we create separate clock_event_devices for each core. For the global clocksource, use cpu 0's counter. Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> |
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.. | ||
board.h | ||
clk.h | ||
debug-macro.S | ||
dma.h | ||
entry-macro-qgic.S | ||
entry-macro-vic.S | ||
entry-macro.S | ||
gpio.h | ||
hardware.h | ||
io.h | ||
iommu.h | ||
iommu_hw-8xxx.h | ||
irqs-7x00.h | ||
irqs-7x30.h | ||
irqs-8x50.h | ||
irqs-8x60.h | ||
irqs.h | ||
memory.h | ||
mmc.h | ||
msm_fb.h | ||
msm_iomap-7x00.h | ||
msm_iomap-7x30.h | ||
msm_iomap-8x50.h | ||
msm_iomap-8x60.h | ||
msm_iomap.h | ||
msm_smd.h | ||
sirc.h | ||
smp.h | ||
system.h | ||
timex.h | ||
uncompress.h | ||
vmalloc.h | ||
vreg.h |