91 lines
2.6 KiB
C
91 lines
2.6 KiB
C
/***************************************************************************/
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/*
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* pit.c -- Freescale ColdFire PIT timer. Currently this type of
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* hardware timer only exists in the Freescale ColdFire
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* 5270/5271, 5282 and other CPUs.
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*
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* Copyright (C) 1999-2006, Greg Ungerer (gerg@snapgear.com)
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* Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
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*
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/coldfire.h>
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#include <asm/mcfpit.h>
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#include <asm/mcfsim.h>
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/***************************************************************************/
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/*
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* By default use timer1 as the system clock timer.
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*/
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#define TA(a) (MCF_IPSBAR + MCFPIT_BASE1 + (a))
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/***************************************************************************/
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void coldfire_pit_tick(void)
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{
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unsigned short pcsr;
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/* Reset the ColdFire timer */
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pcsr = __raw_readw(TA(MCFPIT_PCSR));
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__raw_writew(pcsr | MCFPIT_PCSR_PIF, TA(MCFPIT_PCSR));
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}
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/***************************************************************************/
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void coldfire_pit_init(irq_handler_t handler)
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{
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volatile unsigned char *icrp;
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volatile unsigned long *imrp;
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request_irq(MCFINT_VECBASE + MCFINT_PIT1, handler, IRQF_DISABLED,
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"ColdFire Timer", NULL);
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icrp = (volatile unsigned char *) (MCF_IPSBAR + MCFICM_INTC0 +
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MCFINTC_ICR0 + MCFINT_PIT1);
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*icrp = ICR_INTRCONF;
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imrp = (volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFPIT_IMR);
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*imrp &= ~MCFPIT_IMR_IBIT;
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/* Set up PIT timer 1 as poll clock */
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__raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));
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__raw_writew(((MCF_CLK / 2) / 64) / HZ, TA(MCFPIT_PMR));
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__raw_writew(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | MCFPIT_PCSR_OVW |
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MCFPIT_PCSR_RLD | MCFPIT_PCSR_CLK64, TA(MCFPIT_PCSR));
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}
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/***************************************************************************/
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unsigned long coldfire_pit_offset(void)
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{
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volatile unsigned long *ipr;
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unsigned long pmr, pcntr, offset;
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ipr = (volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFPIT_IMR);
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pmr = __raw_readw(TA(MCFPIT_PMR));
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pcntr = __raw_readw(TA(MCFPIT_PCNTR));
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/*
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* If we are still in the first half of the upcount and a
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* timer interupt is pending, then add on a ticks worth of time.
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*/
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offset = ((pmr - pcntr) * (1000000 / HZ)) / pmr;
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if ((offset < (1000000 / HZ / 2)) && (*ipr & MCFPIT_IMR_IBIT))
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offset += 1000000 / HZ;
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return offset;
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}
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/***************************************************************************/
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