354 lines
8.4 KiB
C
354 lines
8.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Freescale vf610 GPIO support through PORT and GPIO
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*
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* Copyright (c) 2014 Toradex AG.
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*
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* Author: Stefan Agner <stefan@agner.ch>.
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*/
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/gpio/driver.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_irq.h>
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#define VF610_GPIO_PER_PORT 32
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struct fsl_gpio_soc_data {
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/* SoCs has a Port Data Direction Register (PDDR) */
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bool have_paddr;
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};
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struct vf610_gpio_port {
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struct gpio_chip gc;
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struct irq_chip ic;
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void __iomem *base;
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void __iomem *gpio_base;
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const struct fsl_gpio_soc_data *sdata;
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u8 irqc[VF610_GPIO_PER_PORT];
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struct clk *clk_port;
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struct clk *clk_gpio;
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int irq;
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};
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#define GPIO_PDOR 0x00
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#define GPIO_PSOR 0x04
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#define GPIO_PCOR 0x08
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#define GPIO_PTOR 0x0c
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#define GPIO_PDIR 0x10
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#define GPIO_PDDR 0x14
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#define PORT_PCR(n) ((n) * 0x4)
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#define PORT_PCR_IRQC_OFFSET 16
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#define PORT_ISFR 0xa0
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#define PORT_DFER 0xc0
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#define PORT_DFCR 0xc4
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#define PORT_DFWR 0xc8
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#define PORT_INT_OFF 0x0
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#define PORT_INT_LOGIC_ZERO 0x8
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#define PORT_INT_RISING_EDGE 0x9
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#define PORT_INT_FALLING_EDGE 0xa
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#define PORT_INT_EITHER_EDGE 0xb
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#define PORT_INT_LOGIC_ONE 0xc
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static const struct fsl_gpio_soc_data imx_data = {
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.have_paddr = true,
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};
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static const struct of_device_id vf610_gpio_dt_ids[] = {
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{ .compatible = "fsl,vf610-gpio", .data = NULL, },
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{ .compatible = "fsl,imx7ulp-gpio", .data = &imx_data, },
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{ /* sentinel */ }
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};
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static inline void vf610_gpio_writel(u32 val, void __iomem *reg)
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{
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writel_relaxed(val, reg);
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}
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static inline u32 vf610_gpio_readl(void __iomem *reg)
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{
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return readl_relaxed(reg);
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}
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static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio)
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{
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struct vf610_gpio_port *port = gpiochip_get_data(gc);
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unsigned long mask = BIT(gpio);
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unsigned long offset = GPIO_PDIR;
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if (port->sdata && port->sdata->have_paddr) {
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mask &= vf610_gpio_readl(port->gpio_base + GPIO_PDDR);
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if (mask)
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offset = GPIO_PDOR;
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}
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return !!(vf610_gpio_readl(port->gpio_base + offset) & BIT(gpio));
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}
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static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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struct vf610_gpio_port *port = gpiochip_get_data(gc);
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unsigned long mask = BIT(gpio);
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unsigned long offset = val ? GPIO_PSOR : GPIO_PCOR;
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vf610_gpio_writel(mask, port->gpio_base + offset);
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}
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static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
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{
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struct vf610_gpio_port *port = gpiochip_get_data(chip);
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unsigned long mask = BIT(gpio);
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u32 val;
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if (port->sdata && port->sdata->have_paddr) {
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val = vf610_gpio_readl(port->gpio_base + GPIO_PDDR);
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val &= ~mask;
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vf610_gpio_writel(val, port->gpio_base + GPIO_PDDR);
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}
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return pinctrl_gpio_direction_input(chip->base + gpio);
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}
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static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
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int value)
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{
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struct vf610_gpio_port *port = gpiochip_get_data(chip);
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unsigned long mask = BIT(gpio);
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if (port->sdata && port->sdata->have_paddr)
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vf610_gpio_writel(mask, port->gpio_base + GPIO_PDDR);
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vf610_gpio_set(chip, gpio, value);
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return pinctrl_gpio_direction_output(chip->base + gpio);
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}
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static void vf610_gpio_irq_handler(struct irq_desc *desc)
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{
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struct vf610_gpio_port *port =
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gpiochip_get_data(irq_desc_get_handler_data(desc));
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struct irq_chip *chip = irq_desc_get_chip(desc);
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int pin;
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unsigned long irq_isfr;
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chained_irq_enter(chip, desc);
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irq_isfr = vf610_gpio_readl(port->base + PORT_ISFR);
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for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) {
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vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR);
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generic_handle_irq(irq_find_mapping(port->gc.irq.domain, pin));
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}
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chained_irq_exit(chip, desc);
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}
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static void vf610_gpio_irq_ack(struct irq_data *d)
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{
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struct vf610_gpio_port *port =
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gpiochip_get_data(irq_data_get_irq_chip_data(d));
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int gpio = d->hwirq;
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vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR);
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}
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static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type)
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{
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struct vf610_gpio_port *port =
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gpiochip_get_data(irq_data_get_irq_chip_data(d));
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u8 irqc;
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switch (type) {
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case IRQ_TYPE_EDGE_RISING:
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irqc = PORT_INT_RISING_EDGE;
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break;
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case IRQ_TYPE_EDGE_FALLING:
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irqc = PORT_INT_FALLING_EDGE;
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break;
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case IRQ_TYPE_EDGE_BOTH:
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irqc = PORT_INT_EITHER_EDGE;
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break;
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case IRQ_TYPE_LEVEL_LOW:
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irqc = PORT_INT_LOGIC_ZERO;
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break;
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case IRQ_TYPE_LEVEL_HIGH:
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irqc = PORT_INT_LOGIC_ONE;
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break;
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default:
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return -EINVAL;
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}
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port->irqc[d->hwirq] = irqc;
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if (type & IRQ_TYPE_LEVEL_MASK)
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irq_set_handler_locked(d, handle_level_irq);
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else
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irq_set_handler_locked(d, handle_edge_irq);
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return 0;
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}
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static void vf610_gpio_irq_mask(struct irq_data *d)
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{
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struct vf610_gpio_port *port =
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gpiochip_get_data(irq_data_get_irq_chip_data(d));
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void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
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vf610_gpio_writel(0, pcr_base);
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}
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static void vf610_gpio_irq_unmask(struct irq_data *d)
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{
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struct vf610_gpio_port *port =
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gpiochip_get_data(irq_data_get_irq_chip_data(d));
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void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
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vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET,
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pcr_base);
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}
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static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable)
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{
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struct vf610_gpio_port *port =
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gpiochip_get_data(irq_data_get_irq_chip_data(d));
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if (enable)
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enable_irq_wake(port->irq);
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else
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disable_irq_wake(port->irq);
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return 0;
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}
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static void vf610_gpio_disable_clk(void *data)
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{
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clk_disable_unprepare(data);
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}
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static int vf610_gpio_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct vf610_gpio_port *port;
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struct gpio_chip *gc;
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struct gpio_irq_chip *girq;
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struct irq_chip *ic;
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int i;
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int ret;
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port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
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if (!port)
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return -ENOMEM;
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port->sdata = of_device_get_match_data(dev);
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port->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(port->base))
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return PTR_ERR(port->base);
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port->gpio_base = devm_platform_ioremap_resource(pdev, 1);
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if (IS_ERR(port->gpio_base))
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return PTR_ERR(port->gpio_base);
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port->irq = platform_get_irq(pdev, 0);
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if (port->irq < 0)
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return port->irq;
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port->clk_port = devm_clk_get(dev, "port");
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ret = PTR_ERR_OR_ZERO(port->clk_port);
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if (!ret) {
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ret = clk_prepare_enable(port->clk_port);
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if (ret)
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return ret;
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ret = devm_add_action_or_reset(dev, vf610_gpio_disable_clk,
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port->clk_port);
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if (ret)
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return ret;
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} else if (ret == -EPROBE_DEFER) {
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/*
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* Percolate deferrals, for anything else,
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* just live without the clocking.
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*/
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return ret;
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}
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port->clk_gpio = devm_clk_get(dev, "gpio");
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ret = PTR_ERR_OR_ZERO(port->clk_gpio);
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if (!ret) {
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ret = clk_prepare_enable(port->clk_gpio);
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if (ret)
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return ret;
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ret = devm_add_action_or_reset(dev, vf610_gpio_disable_clk,
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port->clk_gpio);
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if (ret)
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return ret;
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} else if (ret == -EPROBE_DEFER) {
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return ret;
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}
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gc = &port->gc;
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gc->of_node = np;
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gc->parent = dev;
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gc->label = "vf610-gpio";
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gc->ngpio = VF610_GPIO_PER_PORT;
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gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT;
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gc->request = gpiochip_generic_request;
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gc->free = gpiochip_generic_free;
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gc->direction_input = vf610_gpio_direction_input;
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gc->get = vf610_gpio_get;
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gc->direction_output = vf610_gpio_direction_output;
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gc->set = vf610_gpio_set;
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ic = &port->ic;
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ic->name = "gpio-vf610";
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ic->irq_ack = vf610_gpio_irq_ack;
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ic->irq_mask = vf610_gpio_irq_mask;
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ic->irq_unmask = vf610_gpio_irq_unmask;
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ic->irq_set_type = vf610_gpio_irq_set_type;
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ic->irq_set_wake = vf610_gpio_irq_set_wake;
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/* Mask all GPIO interrupts */
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for (i = 0; i < gc->ngpio; i++)
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vf610_gpio_writel(0, port->base + PORT_PCR(i));
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/* Clear the interrupt status register for all GPIO's */
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vf610_gpio_writel(~0, port->base + PORT_ISFR);
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girq = &gc->irq;
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girq->chip = ic;
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girq->parent_handler = vf610_gpio_irq_handler;
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girq->num_parents = 1;
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girq->parents = devm_kcalloc(&pdev->dev, 1,
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sizeof(*girq->parents),
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GFP_KERNEL);
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if (!girq->parents)
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return -ENOMEM;
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girq->parents[0] = port->irq;
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girq->default_type = IRQ_TYPE_NONE;
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girq->handler = handle_edge_irq;
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return devm_gpiochip_add_data(dev, gc, port);
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}
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static struct platform_driver vf610_gpio_driver = {
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.driver = {
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.name = "gpio-vf610",
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.of_match_table = vf610_gpio_dt_ids,
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},
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.probe = vf610_gpio_probe,
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};
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builtin_platform_driver(vf610_gpio_driver);
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