206 lines
5.4 KiB
C
206 lines
5.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* tw68 driver common header file
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*
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* Much of this code is derived from the cx88 and sa7134 drivers, which
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* were in turn derived from the bt87x driver. The original work was by
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* Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
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* Hans Verkuil, Andy Walls and many others. Their work is gratefully
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* acknowledged. Full credit goes to them - any problems within this code
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* are mine.
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*
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* Copyright (C) 2009 William M. Brack
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*
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* Refactored and updated to the latest v4l core frameworks:
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*
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* Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
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*/
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#include <linux/pci.h>
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#include <linux/videodev2.h>
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#include <linux/notifier.h>
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#include <linux/delay.h>
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#include <linux/mutex.h>
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#include <linux/io.h>
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#include <media/v4l2-common.h>
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#include <media/v4l2-ioctl.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-device.h>
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#include <media/videobuf2-v4l2.h>
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#include <media/videobuf2-dma-sg.h>
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#include "tw68-reg.h"
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#define UNSET (-1U)
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#define TW68_NORMS ( \
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V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM | \
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V4L2_STD_PAL_M | V4L2_STD_PAL_Nc | V4L2_STD_PAL_60)
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#define TW68_VID_INTS (TW68_FFERR | TW68_PABORT | TW68_DMAPERR | \
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TW68_FFOF | TW68_DMAPI)
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/* TW6800 chips have trouble with these, so we don't set them for that chip */
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#define TW68_VID_INTSX (TW68_FDMIS | TW68_HLOCK | TW68_VLOCK)
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#define TW68_I2C_INTS (TW68_SBERR | TW68_SBDONE | TW68_SBERR2 | \
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TW68_SBDONE2)
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enum tw68_decoder_type {
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TW6800,
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TW6801,
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TW6804,
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TWXXXX,
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};
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/* ----------------------------------------------------------- */
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/* static data */
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struct tw68_tvnorm {
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char *name;
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v4l2_std_id id;
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/* video decoder */
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u32 sync_control;
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u32 luma_control;
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u32 chroma_ctrl1;
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u32 chroma_gain;
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u32 chroma_ctrl2;
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u32 vgate_misc;
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/* video scaler */
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u32 h_delay;
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u32 h_delay0; /* for TW6800 */
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u32 h_start;
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u32 h_stop;
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u32 v_delay;
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u32 video_v_start;
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u32 video_v_stop;
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u32 vbi_v_start_0;
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u32 vbi_v_stop_0;
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u32 vbi_v_start_1;
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/* Techwell specific */
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u32 format;
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};
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struct tw68_format {
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u32 fourcc;
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u32 depth;
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u32 twformat;
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};
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/* ----------------------------------------------------------- */
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/* card configuration */
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#define TW68_BOARD_NOAUTO UNSET
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#define TW68_BOARD_UNKNOWN 0
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#define TW68_BOARD_GENERIC_6802 1
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#define TW68_MAXBOARDS 16
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#define TW68_INPUT_MAX 4
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/* ----------------------------------------------------------- */
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/* device / file handle status */
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#define BUFFER_TIMEOUT msecs_to_jiffies(500) /* 0.5 seconds */
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struct tw68_dev; /* forward delclaration */
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/* buffer for one video/vbi/ts frame */
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struct tw68_buf {
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struct vb2_v4l2_buffer vb;
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struct list_head list;
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unsigned int size;
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__le32 *cpu;
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__le32 *jmp;
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dma_addr_t dma;
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};
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struct tw68_fmt {
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char *name;
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u32 fourcc; /* v4l2 format id */
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int depth;
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int flags;
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u32 twformat;
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};
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/* global device status */
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struct tw68_dev {
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struct mutex lock;
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spinlock_t slock;
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u16 instance;
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struct v4l2_device v4l2_dev;
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/* various device info */
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enum tw68_decoder_type vdecoder;
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struct video_device vdev;
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struct v4l2_ctrl_handler hdl;
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/* pci i/o */
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char *name;
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struct pci_dev *pci;
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unsigned char pci_rev, pci_lat;
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u32 __iomem *lmmio;
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u8 __iomem *bmmio;
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u32 pci_irqmask;
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/* The irq mask to be used will depend upon the chip type */
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u32 board_virqmask;
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/* video capture */
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const struct tw68_format *fmt;
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unsigned width, height;
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unsigned seqnr;
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unsigned field;
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struct vb2_queue vidq;
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struct list_head active;
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/* various v4l controls */
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const struct tw68_tvnorm *tvnorm; /* video */
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int input;
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};
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/* ----------------------------------------------------------- */
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#define tw_readl(reg) readl(dev->lmmio + ((reg) >> 2))
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#define tw_readb(reg) readb(dev->bmmio + (reg))
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#define tw_writel(reg, value) writel((value), dev->lmmio + ((reg) >> 2))
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#define tw_writeb(reg, value) writeb((value), dev->bmmio + (reg))
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#define tw_andorl(reg, mask, value) \
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writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
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((value) & (mask)), dev->lmmio+((reg)>>2))
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#define tw_andorb(reg, mask, value) \
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writeb((readb(dev->bmmio + (reg)) & ~(mask)) |\
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((value) & (mask)), dev->bmmio+(reg))
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#define tw_setl(reg, bit) tw_andorl((reg), (bit), (bit))
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#define tw_setb(reg, bit) tw_andorb((reg), (bit), (bit))
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#define tw_clearl(reg, bit) \
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writel((readl(dev->lmmio + ((reg) >> 2)) & ~(bit)), \
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dev->lmmio + ((reg) >> 2))
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#define tw_clearb(reg, bit) \
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writeb((readb(dev->bmmio+(reg)) & ~(bit)), \
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dev->bmmio + (reg))
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#define tw_wait(us) { udelay(us); }
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/* ----------------------------------------------------------- */
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/* tw68-video.c */
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void tw68_set_tvnorm_hw(struct tw68_dev *dev);
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int tw68_video_init1(struct tw68_dev *dev);
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int tw68_video_init2(struct tw68_dev *dev, int video_nr);
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void tw68_irq_video_done(struct tw68_dev *dev, unsigned long status);
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int tw68_video_start_dma(struct tw68_dev *dev, struct tw68_buf *buf);
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/* ----------------------------------------------------------- */
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/* tw68-risc.c */
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int tw68_risc_buffer(struct pci_dev *pci, struct tw68_buf *buf,
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struct scatterlist *sglist, unsigned int top_offset,
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unsigned int bottom_offset, unsigned int bpl,
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unsigned int padding, unsigned int lines);
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