259 lines
6.3 KiB
C
259 lines
6.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: Jie Qiu <jie.qiu@mediatek.com>
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/mod_devicetable.h>
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#include <linux/platform_device.h>
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#include "mtk_cec.h"
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#define TR_CONFIG 0x00
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#define CLEAR_CEC_IRQ BIT(15)
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#define CEC_CKGEN 0x04
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#define CEC_32K_PDN BIT(19)
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#define PDN BIT(16)
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#define RX_EVENT 0x54
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#define HDMI_PORD BIT(25)
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#define HDMI_HTPLG BIT(24)
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#define HDMI_PORD_INT_EN BIT(9)
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#define HDMI_HTPLG_INT_EN BIT(8)
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#define RX_GEN_WD 0x58
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#define HDMI_PORD_INT_32K_STATUS BIT(26)
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#define RX_RISC_INT_32K_STATUS BIT(25)
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#define HDMI_HTPLG_INT_32K_STATUS BIT(24)
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#define HDMI_PORD_INT_32K_CLR BIT(18)
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#define RX_INT_32K_CLR BIT(17)
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#define HDMI_HTPLG_INT_32K_CLR BIT(16)
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#define HDMI_PORD_INT_32K_STA_MASK BIT(10)
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#define RX_RISC_INT_32K_STA_MASK BIT(9)
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#define HDMI_HTPLG_INT_32K_STA_MASK BIT(8)
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#define HDMI_PORD_INT_32K_EN BIT(2)
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#define RX_INT_32K_EN BIT(1)
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#define HDMI_HTPLG_INT_32K_EN BIT(0)
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#define NORMAL_INT_CTRL 0x5C
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#define HDMI_HTPLG_INT_STA BIT(0)
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#define HDMI_PORD_INT_STA BIT(1)
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#define HDMI_HTPLG_INT_CLR BIT(16)
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#define HDMI_PORD_INT_CLR BIT(17)
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#define HDMI_FULL_INT_CLR BIT(20)
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struct mtk_cec {
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void __iomem *regs;
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struct clk *clk;
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int irq;
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bool hpd;
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void (*hpd_event)(bool hpd, struct device *dev);
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struct device *hdmi_dev;
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spinlock_t lock;
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};
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static void mtk_cec_clear_bits(struct mtk_cec *cec, unsigned int offset,
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unsigned int bits)
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{
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void __iomem *reg = cec->regs + offset;
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u32 tmp;
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tmp = readl(reg);
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tmp &= ~bits;
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writel(tmp, reg);
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}
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static void mtk_cec_set_bits(struct mtk_cec *cec, unsigned int offset,
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unsigned int bits)
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{
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void __iomem *reg = cec->regs + offset;
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u32 tmp;
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tmp = readl(reg);
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tmp |= bits;
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writel(tmp, reg);
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}
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static void mtk_cec_mask(struct mtk_cec *cec, unsigned int offset,
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unsigned int val, unsigned int mask)
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{
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u32 tmp = readl(cec->regs + offset) & ~mask;
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tmp |= val & mask;
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writel(val, cec->regs + offset);
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}
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void mtk_cec_set_hpd_event(struct device *dev,
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void (*hpd_event)(bool hpd, struct device *dev),
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struct device *hdmi_dev)
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{
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struct mtk_cec *cec = dev_get_drvdata(dev);
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unsigned long flags;
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spin_lock_irqsave(&cec->lock, flags);
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cec->hdmi_dev = hdmi_dev;
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cec->hpd_event = hpd_event;
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spin_unlock_irqrestore(&cec->lock, flags);
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}
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bool mtk_cec_hpd_high(struct device *dev)
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{
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struct mtk_cec *cec = dev_get_drvdata(dev);
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unsigned int status;
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status = readl(cec->regs + RX_EVENT);
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return (status & (HDMI_PORD | HDMI_HTPLG)) == (HDMI_PORD | HDMI_HTPLG);
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}
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static void mtk_cec_htplg_irq_init(struct mtk_cec *cec)
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{
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mtk_cec_mask(cec, CEC_CKGEN, 0 | CEC_32K_PDN, PDN | CEC_32K_PDN);
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mtk_cec_set_bits(cec, RX_GEN_WD, HDMI_PORD_INT_32K_CLR |
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RX_INT_32K_CLR | HDMI_HTPLG_INT_32K_CLR);
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mtk_cec_mask(cec, RX_GEN_WD, 0, HDMI_PORD_INT_32K_CLR | RX_INT_32K_CLR |
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HDMI_HTPLG_INT_32K_CLR | HDMI_PORD_INT_32K_EN |
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RX_INT_32K_EN | HDMI_HTPLG_INT_32K_EN);
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}
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static void mtk_cec_htplg_irq_enable(struct mtk_cec *cec)
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{
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mtk_cec_set_bits(cec, RX_EVENT, HDMI_PORD_INT_EN | HDMI_HTPLG_INT_EN);
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}
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static void mtk_cec_htplg_irq_disable(struct mtk_cec *cec)
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{
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mtk_cec_clear_bits(cec, RX_EVENT, HDMI_PORD_INT_EN | HDMI_HTPLG_INT_EN);
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}
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static void mtk_cec_clear_htplg_irq(struct mtk_cec *cec)
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{
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mtk_cec_set_bits(cec, TR_CONFIG, CLEAR_CEC_IRQ);
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mtk_cec_set_bits(cec, NORMAL_INT_CTRL, HDMI_HTPLG_INT_CLR |
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HDMI_PORD_INT_CLR | HDMI_FULL_INT_CLR);
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mtk_cec_set_bits(cec, RX_GEN_WD, HDMI_PORD_INT_32K_CLR |
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RX_INT_32K_CLR | HDMI_HTPLG_INT_32K_CLR);
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usleep_range(5, 10);
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mtk_cec_clear_bits(cec, NORMAL_INT_CTRL, HDMI_HTPLG_INT_CLR |
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HDMI_PORD_INT_CLR | HDMI_FULL_INT_CLR);
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mtk_cec_clear_bits(cec, TR_CONFIG, CLEAR_CEC_IRQ);
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mtk_cec_clear_bits(cec, RX_GEN_WD, HDMI_PORD_INT_32K_CLR |
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RX_INT_32K_CLR | HDMI_HTPLG_INT_32K_CLR);
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}
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static void mtk_cec_hpd_event(struct mtk_cec *cec, bool hpd)
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{
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void (*hpd_event)(bool hpd, struct device *dev);
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struct device *hdmi_dev;
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unsigned long flags;
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spin_lock_irqsave(&cec->lock, flags);
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hpd_event = cec->hpd_event;
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hdmi_dev = cec->hdmi_dev;
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spin_unlock_irqrestore(&cec->lock, flags);
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if (hpd_event)
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hpd_event(hpd, hdmi_dev);
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}
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static irqreturn_t mtk_cec_htplg_isr_thread(int irq, void *arg)
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{
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struct device *dev = arg;
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struct mtk_cec *cec = dev_get_drvdata(dev);
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bool hpd;
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mtk_cec_clear_htplg_irq(cec);
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hpd = mtk_cec_hpd_high(dev);
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if (cec->hpd != hpd) {
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dev_dbg(dev, "hotplug event! cur hpd = %d, hpd = %d\n",
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cec->hpd, hpd);
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cec->hpd = hpd;
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mtk_cec_hpd_event(cec, hpd);
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}
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return IRQ_HANDLED;
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}
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static int mtk_cec_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct mtk_cec *cec;
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struct resource *res;
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int ret;
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cec = devm_kzalloc(dev, sizeof(*cec), GFP_KERNEL);
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if (!cec)
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return -ENOMEM;
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platform_set_drvdata(pdev, cec);
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spin_lock_init(&cec->lock);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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cec->regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(cec->regs)) {
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ret = PTR_ERR(cec->regs);
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dev_err(dev, "Failed to ioremap cec: %d\n", ret);
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return ret;
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}
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cec->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(cec->clk)) {
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ret = PTR_ERR(cec->clk);
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dev_err(dev, "Failed to get cec clock: %d\n", ret);
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return ret;
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}
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cec->irq = platform_get_irq(pdev, 0);
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if (cec->irq < 0) {
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dev_err(dev, "Failed to get cec irq: %d\n", cec->irq);
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return cec->irq;
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}
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ret = devm_request_threaded_irq(dev, cec->irq, NULL,
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mtk_cec_htplg_isr_thread,
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IRQF_SHARED | IRQF_TRIGGER_LOW |
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IRQF_ONESHOT, "hdmi hpd", dev);
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if (ret) {
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dev_err(dev, "Failed to register cec irq: %d\n", ret);
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return ret;
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}
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ret = clk_prepare_enable(cec->clk);
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if (ret) {
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dev_err(dev, "Failed to enable cec clock: %d\n", ret);
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return ret;
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}
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mtk_cec_htplg_irq_init(cec);
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mtk_cec_htplg_irq_enable(cec);
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return 0;
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}
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static int mtk_cec_remove(struct platform_device *pdev)
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{
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struct mtk_cec *cec = platform_get_drvdata(pdev);
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mtk_cec_htplg_irq_disable(cec);
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clk_disable_unprepare(cec->clk);
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return 0;
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}
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static const struct of_device_id mtk_cec_of_ids[] = {
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{ .compatible = "mediatek,mt8173-cec", },
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{}
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};
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struct platform_driver mtk_cec_driver = {
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.probe = mtk_cec_probe,
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.remove = mtk_cec_remove,
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.driver = {
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.name = "mediatek-cec",
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.of_match_table = mtk_cec_of_ids,
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},
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};
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