73 lines
1.5 KiB
C
73 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved.
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*/
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#ifndef TEGRA_PLANE_H
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#define TEGRA_PLANE_H 1
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#include <drm/drm_plane.h>
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struct tegra_bo;
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struct tegra_dc;
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struct tegra_plane {
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struct drm_plane base;
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struct tegra_dc *dc;
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unsigned int offset;
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unsigned int index;
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};
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struct tegra_cursor {
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struct tegra_plane base;
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struct tegra_bo *bo;
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unsigned int width;
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unsigned int height;
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};
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static inline struct tegra_plane *to_tegra_plane(struct drm_plane *plane)
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{
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return container_of(plane, struct tegra_plane, base);
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}
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struct tegra_plane_legacy_blending_state {
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bool alpha;
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bool top;
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};
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struct tegra_plane_state {
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struct drm_plane_state base;
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struct tegra_bo_tiling tiling;
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u32 format;
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u32 swap;
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bool bottom_up;
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/* used for legacy blending support only */
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struct tegra_plane_legacy_blending_state blending[2];
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bool opaque;
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};
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static inline struct tegra_plane_state *
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to_tegra_plane_state(struct drm_plane_state *state)
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{
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if (state)
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return container_of(state, struct tegra_plane_state, base);
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return NULL;
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}
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extern const struct drm_plane_funcs tegra_plane_funcs;
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int tegra_plane_state_add(struct tegra_plane *plane,
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struct drm_plane_state *state);
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int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap);
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bool tegra_plane_format_is_yuv(unsigned int format, bool *planar);
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int tegra_plane_setup_legacy_state(struct tegra_plane *tegra,
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struct tegra_plane_state *state);
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#endif /* TEGRA_PLANE_H */
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