292 lines
8.8 KiB
C
292 lines
8.8 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2022 Intel Corporation
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*/
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/**
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* DOC: I915_PARAM_VM_BIND_VERSION
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*
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* VM_BIND feature version supported.
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* See typedef drm_i915_getparam_t param.
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*
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* Specifies the VM_BIND feature version supported.
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* The following versions of VM_BIND have been defined:
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*
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* 0: No VM_BIND support.
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*
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* 1: In VM_UNBIND calls, the UMD must specify the exact mappings created
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* previously with VM_BIND, the ioctl will not support unbinding multiple
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* mappings or splitting them. Similarly, VM_BIND calls will not replace
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* any existing mappings.
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*
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* 2: The restrictions on unbinding partial or multiple mappings is
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* lifted, Similarly, binding will replace any mappings in the given range.
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*
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* See struct drm_i915_gem_vm_bind and struct drm_i915_gem_vm_unbind.
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*/
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#define I915_PARAM_VM_BIND_VERSION 57
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/**
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* DOC: I915_VM_CREATE_FLAGS_USE_VM_BIND
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*
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* Flag to opt-in for VM_BIND mode of binding during VM creation.
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* See struct drm_i915_gem_vm_control flags.
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*
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* The older execbuf2 ioctl will not support VM_BIND mode of operation.
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* For VM_BIND mode, we have new execbuf3 ioctl which will not accept any
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* execlist (See struct drm_i915_gem_execbuffer3 for more details).
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*/
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#define I915_VM_CREATE_FLAGS_USE_VM_BIND (1 << 0)
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/* VM_BIND related ioctls */
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#define DRM_I915_GEM_VM_BIND 0x3d
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#define DRM_I915_GEM_VM_UNBIND 0x3e
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#define DRM_I915_GEM_EXECBUFFER3 0x3f
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#define DRM_IOCTL_I915_GEM_VM_BIND DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_BIND, struct drm_i915_gem_vm_bind)
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#define DRM_IOCTL_I915_GEM_VM_UNBIND DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_UNBIND, struct drm_i915_gem_vm_bind)
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#define DRM_IOCTL_I915_GEM_EXECBUFFER3 DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER3, struct drm_i915_gem_execbuffer3)
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/**
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* struct drm_i915_gem_timeline_fence - An input or output timeline fence.
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*
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* The operation will wait for input fence to signal.
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*
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* The returned output fence will be signaled after the completion of the
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* operation.
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*/
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struct drm_i915_gem_timeline_fence {
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/** @handle: User's handle for a drm_syncobj to wait on or signal. */
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__u32 handle;
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/**
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* @flags: Supported flags are:
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*
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* I915_TIMELINE_FENCE_WAIT:
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* Wait for the input fence before the operation.
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*
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* I915_TIMELINE_FENCE_SIGNAL:
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* Return operation completion fence as output.
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*/
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__u32 flags;
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#define I915_TIMELINE_FENCE_WAIT (1 << 0)
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#define I915_TIMELINE_FENCE_SIGNAL (1 << 1)
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#define __I915_TIMELINE_FENCE_UNKNOWN_FLAGS (-(I915_TIMELINE_FENCE_SIGNAL << 1))
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/**
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* @value: A point in the timeline.
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* Value must be 0 for a binary drm_syncobj. A Value of 0 for a
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* timeline drm_syncobj is invalid as it turns a drm_syncobj into a
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* binary one.
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*/
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__u64 value;
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};
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/**
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* struct drm_i915_gem_vm_bind - VA to object mapping to bind.
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*
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* This structure is passed to VM_BIND ioctl and specifies the mapping of GPU
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* virtual address (VA) range to the section of an object that should be bound
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* in the device page table of the specified address space (VM).
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* The VA range specified must be unique (ie., not currently bound) and can
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* be mapped to whole object or a section of the object (partial binding).
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* Multiple VA mappings can be created to the same section of the object
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* (aliasing).
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*
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* The @start, @offset and @length must be 4K page aligned. However the DG2
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* and XEHPSDV has 64K page size for device local memory and has compact page
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* table. On those platforms, for binding device local-memory objects, the
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* @start, @offset and @length must be 64K aligned. Also, UMDs should not mix
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* the local memory 64K page and the system memory 4K page bindings in the same
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* 2M range.
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*
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* Error code -EINVAL will be returned if @start, @offset and @length are not
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* properly aligned. In version 1 (See I915_PARAM_VM_BIND_VERSION), error code
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* -ENOSPC will be returned if the VA range specified can't be reserved.
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*
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* VM_BIND/UNBIND ioctl calls executed on different CPU threads concurrently
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* are not ordered. Furthermore, parts of the VM_BIND operation can be done
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* asynchronously, if valid @fence is specified.
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*/
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struct drm_i915_gem_vm_bind {
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/** @vm_id: VM (address space) id to bind */
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__u32 vm_id;
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/** @handle: Object handle */
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__u32 handle;
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/** @start: Virtual Address start to bind */
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__u64 start;
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/** @offset: Offset in object to bind */
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__u64 offset;
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/** @length: Length of mapping to bind */
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__u64 length;
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/**
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* @flags: Supported flags are:
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*
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* I915_GEM_VM_BIND_CAPTURE:
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* Capture this mapping in the dump upon GPU error.
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*
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* Note that @fence carries its own flags.
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*/
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__u64 flags;
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#define I915_GEM_VM_BIND_CAPTURE (1 << 0)
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/**
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* @fence: Timeline fence for bind completion signaling.
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*
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* Timeline fence is of format struct drm_i915_gem_timeline_fence.
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*
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* It is an out fence, hence using I915_TIMELINE_FENCE_WAIT flag
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* is invalid, and an error will be returned.
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*
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* If I915_TIMELINE_FENCE_SIGNAL flag is not set, then out fence
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* is not requested and binding is completed synchronously.
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*/
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struct drm_i915_gem_timeline_fence fence;
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/**
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* @extensions: Zero-terminated chain of extensions.
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*
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* For future extensions. See struct i915_user_extension.
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*/
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__u64 extensions;
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};
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/**
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* struct drm_i915_gem_vm_unbind - VA to object mapping to unbind.
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*
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* This structure is passed to VM_UNBIND ioctl and specifies the GPU virtual
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* address (VA) range that should be unbound from the device page table of the
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* specified address space (VM). VM_UNBIND will force unbind the specified
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* range from device page table without waiting for any GPU job to complete.
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* It is UMDs responsibility to ensure the mapping is no longer in use before
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* calling VM_UNBIND.
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*
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* If the specified mapping is not found, the ioctl will simply return without
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* any error.
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*
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* VM_BIND/UNBIND ioctl calls executed on different CPU threads concurrently
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* are not ordered. Furthermore, parts of the VM_UNBIND operation can be done
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* asynchronously, if valid @fence is specified.
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*/
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struct drm_i915_gem_vm_unbind {
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/** @vm_id: VM (address space) id to bind */
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__u32 vm_id;
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/** @rsvd: Reserved, MBZ */
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__u32 rsvd;
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/** @start: Virtual Address start to unbind */
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__u64 start;
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/** @length: Length of mapping to unbind */
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__u64 length;
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/**
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* @flags: Currently reserved, MBZ.
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*
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* Note that @fence carries its own flags.
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*/
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__u64 flags;
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/**
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* @fence: Timeline fence for unbind completion signaling.
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*
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* Timeline fence is of format struct drm_i915_gem_timeline_fence.
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*
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* It is an out fence, hence using I915_TIMELINE_FENCE_WAIT flag
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* is invalid, and an error will be returned.
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*
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* If I915_TIMELINE_FENCE_SIGNAL flag is not set, then out fence
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* is not requested and unbinding is completed synchronously.
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*/
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struct drm_i915_gem_timeline_fence fence;
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/**
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* @extensions: Zero-terminated chain of extensions.
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*
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* For future extensions. See struct i915_user_extension.
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*/
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__u64 extensions;
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};
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/**
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* struct drm_i915_gem_execbuffer3 - Structure for DRM_I915_GEM_EXECBUFFER3
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* ioctl.
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*
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* DRM_I915_GEM_EXECBUFFER3 ioctl only works in VM_BIND mode and VM_BIND mode
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* only works with this ioctl for submission.
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* See I915_VM_CREATE_FLAGS_USE_VM_BIND.
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*/
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struct drm_i915_gem_execbuffer3 {
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/**
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* @ctx_id: Context id
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*
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* Only contexts with user engine map are allowed.
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*/
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__u32 ctx_id;
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/**
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* @engine_idx: Engine index
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*
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* An index in the user engine map of the context specified by @ctx_id.
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*/
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__u32 engine_idx;
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/**
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* @batch_address: Batch gpu virtual address/es.
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*
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* For normal submission, it is the gpu virtual address of the batch
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* buffer. For parallel submission, it is a pointer to an array of
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* batch buffer gpu virtual addresses with array size equal to the
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* number of (parallel) engines involved in that submission (See
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* struct i915_context_engines_parallel_submit).
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*/
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__u64 batch_address;
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/** @flags: Currently reserved, MBZ */
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__u64 flags;
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/** @rsvd1: Reserved, MBZ */
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__u32 rsvd1;
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/** @fence_count: Number of fences in @timeline_fences array. */
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__u32 fence_count;
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/**
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* @timeline_fences: Pointer to an array of timeline fences.
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*
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* Timeline fences are of format struct drm_i915_gem_timeline_fence.
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*/
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__u64 timeline_fences;
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/** @rsvd2: Reserved, MBZ */
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__u64 rsvd2;
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/**
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* @extensions: Zero-terminated chain of extensions.
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*
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* For future extensions. See struct i915_user_extension.
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*/
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__u64 extensions;
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};
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/**
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* struct drm_i915_gem_create_ext_vm_private - Extension to make the object
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* private to the specified VM.
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*
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* See struct drm_i915_gem_create_ext.
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*/
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struct drm_i915_gem_create_ext_vm_private {
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#define I915_GEM_CREATE_EXT_VM_PRIVATE 2
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/** @base: Extension link. See struct i915_user_extension. */
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struct i915_user_extension base;
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/** @vm_id: Id of the VM to which the object is private */
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__u32 vm_id;
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};
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