original_kernel/arch/x86/events
Kan Liang 38776cc45e perf/x86/uncore: Correct the number of CHAs on SPR
The number of CHAs from the discovery table on some SPR variants is
incorrect, because of a firmware issue. An accurate number can be read
from the MSR UNC_CBO_CONFIG.

Fixes: 949b11381f ("perf/x86/intel/uncore: Add Sapphire Rapids server CHA support")
Reported-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Stephane Eranian <eranian@google.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20230508140206.283708-1-kan.liang@linux.intel.com
2023-05-24 22:19:41 +02:00
..
amd perf/x86/amd/core: Always clear status for idx 2023-03-21 14:43:05 +01:00
intel perf/x86/uncore: Correct the number of CHAs on SPR 2023-05-24 22:19:41 +02:00
zhaoxin
Kconfig
Makefile
core.c perf/x86: Fix missing sample size update on AMD BRS 2023-05-08 10:58:26 +02:00
msr.c perf/x86/msr: Add Granite Rapids 2023-03-21 14:43:08 +01:00
perf_event.h
perf_event_flags.h
probe.c
probe.h
rapl.c
utils.c