original_kernel/drivers/mmc/host
Philipp Zabel 97f8571e66 pxamci: fix byte aligned DMA transfers
The pxa27x DMA controller defaults to 64-bit alignment. This caused
the SCR reads to fail (and, depending on card type, error out) when
card->raw_scr was not aligned on a 8-byte boundary.

For performance reasons all scatter-gather addresses passed to
pxamci_request should be aligned on 8-byte boundaries, but if
this can't be guaranteed, byte aligned DMA transfers in the
have to be enabled in the controller to get correct behaviour.

Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-07-06 10:37:40 -07:00
..
Kconfig missing dependencies on HAS_DMA 2008-05-21 16:55:59 -07:00
Makefile
at91_mci.c
au1xmmc.c
au1xmmc.h
imxmmc.c
imxmmc.h
mmc_spi.c
mmci.c
mmci.h
omap.c
pxamci.c pxamci: fix byte aligned DMA transfers 2008-07-06 10:37:40 -07:00
pxamci.h
ricoh_mmc.c
sdhci.c mmc: don't use DMA on newer ENE controllers 2008-07-04 10:44:49 -07:00
sdhci.h
tifm_sd.c
wbsd.c mmc: wbsd: initialize tasklets before requesting interrupt 2008-06-12 18:05:41 -07:00
wbsd.h