original_kernel/arch/x86/kvm
Marc Orr c73f4c998e KVM: x86: nVMX: fix x2APIC VTPR read intercept
Referring to the "VIRTUALIZING MSR-BASED APIC ACCESSES" chapter of the
SDM, when "virtualize x2APIC mode" is 1 and "APIC-register
virtualization" is 0, a RDMSR of 808H should return the VTPR from the
virtual APIC page.

However, for nested, KVM currently fails to disable the read intercept
for this MSR. This means that a RDMSR exit takes precedence over
"virtualize x2APIC mode", and KVM passes through L1's TPR to L2,
instead of sourcing the value from L2's virtual APIC page.

This patch fixes the issue by disabling the read intercept, in VMCS02,
for the VTPR when "APIC-register virtualization" is 0.

The issue described above and fix prescribed here, were verified with
a related patch in kvm-unit-tests titled "Test VMX's virtualize x2APIC
mode w/ nested".

Signed-off-by: Marc Orr <marcorr@google.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Fixes: c992384bde ("KVM: vmx: speed up MSR bitmap merge")
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-04-05 21:08:30 +02:00
..
vmx KVM: x86: nVMX: fix x2APIC VTPR read intercept 2019-04-05 21:08:30 +02:00
Kconfig
Makefile
cpuid.c
cpuid.h
debugfs.c
emulate.c
hyperv.c x86/kvm/hyper-v: avoid spurious pending stimer on vCPU init 2019-03-28 17:29:03 +01:00
hyperv.h
i8254.c
i8254.h
i8259.c
ioapic.c
ioapic.h
irq.c
irq.h
irq_comm.c
kvm_cache_regs.h
lapic.c
lapic.h
mmu.c kvm: mmu: Used range based flushing in slot_handle_level_range 2019-03-28 17:28:57 +01:00
mmu.h
mmu_audit.c
mmutrace.h KVM: x86: fix handling of role.cr4_pae and rename it to 'gpte_size' 2019-03-28 17:27:03 +01:00
mtrr.c
page_track.c
paging_tmpl.h
pmu.c
pmu.h
pmu_amd.c
svm.c KVM: SVM: prevent DBG_DECRYPT and DBG_ENCRYPT overflow 2019-04-05 20:49:42 +02:00
trace.h
tss.h
x86.c KVM: x86: update %rip after emulating IO 2019-03-28 17:29:04 +01:00
x86.h